參數(shù)資料
型號(hào): ADSP-21060LCWZ-160
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字信號(hào)處理
英文描述: 48-BIT, 40 MHz, OTHER DSP, CQFP240
封裝: THERMALLY ENHANCED, METRIC, HEAT SINK, CERAMIC, QFP-240
文件頁(yè)數(shù): 8/48頁(yè)
文件大?。?/td> 481K
代理商: ADSP-21060LCWZ-160
–16–
ADSP-21060C/ADSP-21060LC
REV. B
POWER DISSIPATION ADSP-21060LC (3.3 V)
These specifications apply to the internal power portion of VDD only. See the Power Dissipation section of this data sheet for calcula-
tion of external supply current and total supply current. For a complete discussion of the code used to measure power dissipation,
see the technical note “SHARC Power Dissipation Measurements.”
Specifications are based on the following operating scenarios:
Operation
Peak Activity (IDDINPEAK)
High Activity (IDDINHIGH)
Low Activity (IDDINLOW)
Instruction Type
Multifunction
Single Function
Instruction Fetch
Cache
Internal Memory
Core Memory Access
2 per Cycle (DM and PM)
1 per Cycle (DM)
None
Internal Memory DMA
1 per Cycle
1 per 2 Cycles
To estimate power consumption for a specific application, use the following equation where % is the amount of time your program
spends in that state:
%PEAK
× I
DDINPEAK + %HIGH
× I
DDINHIGH + %LOW
× I
DDINLOW + %IDLE
× I
DDIDLE = power consumption
Parameter
Test Conditions
Max
Unit
IDDINPEAK
Supply Current (Internal)
1
tCK = 30 ns, VDD = max
540
mA
tCK = 25 ns, VDD = max
600
mA
IDDINHIGH
Supply Current (Internal)
2
tCK = 30 ns, VDD = max
425
mA
tCK = 25 ns, VDD = max
475
mA
IDDINLOW
Supply Current (Internal)
2
tCK = 30 ns, VDD = max
250
mA
tCK = 25 ns, VDD = max
275
mA
IDDIDLE
Supply Current (Idle)
3
VDD = max
180
mA
NOTES
1The test program used to measure I
DDINPEAK represents worst-case processor operation and is not sustainable under normal application conditions. Actual internal
power measurements made using typical applications are less than specified.
2I
DDINHIGH is a composite average based on a range of high activity code. I DDINLOW is a composite average based on a range of low activity code.
3Idle denotes ADSP-21060LC state during execution of IDLE instruction.
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