參數(shù)資料
型號(hào)： ADSP-21060LCWZ-160
廠商： ANALOG DEVICES INC
元件分類： 數(shù)字信號(hào)處理
英文描述： 48-BIT, 40 MHz, OTHER DSP, CQFP240
封裝： THERMALLY ENHANCED, METRIC, HEAT SINK, CERAMIC, QFP-240
文件頁數(shù)： 5/48頁
文件大小： 481K
代理商： ADSP-21060LCWZ-160
ADSP-21060C–SPECIFICATIONS
RECOMMENDED OPERATING CONDITIONS (5 V)
K Grade
Parameter
Test Conditions
Min
Max
Unit
VDD
Supply Voltage
4.75
5.25
V
TCASE
Case Operating Temperature
–40
+100
°C
VIH1
High Level Input Voltage
1
@ VDD = max
2.0
VDD + 0.5
V
VIH2
High Level Input Voltage
2
@ VDD = max
2.2
VDD + 0.5
V
VIL
Low Level Input Voltage1, 2
@ VDD = min
–0.5
+0.8
V
NOTES
1Applies to input and bidirectional pins: DATA
47-0, ADDR 31-0, RD, WR, SW, ACK, SBTS, IRQ2-0, FLAG3-0, HBG, CS, DMAR1, DMAR2, BR6-1, ID2-0, RPBA,
CPA, TFS0, TFS1, RFS0, RFS1, LxDAT
3-0, LxCLK, LxACK, EBOOT, LBOOT, BMS, TMS, TDI, TCK, HBR, DR0, DR1, TCLK0, TCLK1, RCLK0, RCLK1.
2Applies to input pins: CLKIN,
RESET, TRST.
ELECTRICAL CHARACTERISTICS (5 V)
Parameter
Test Conditions
Min
Max
Unit
VOH
High Level Output Voltage1
@ VDD = min, IOH = –2.0 mA
2
4.1
V
VOL
Low Level Output Voltage
1
@ VDD = min, IOL = 4.0 mA
2
0.4
V
IIH
High Level Input Current
3, 4
@ VDD = max, VIN = VDD max
10
A
IIL
Low Level Input Current3
@ VDD = max, VIN = 0 V
10
A
IILP
Low Level Input Current
4
@ VDD = max, VIN = 0 V
150
A
IOZH
Three-State Leakage Current
5, 6, 7, 8
@ VDD = max, VIN = VDD max
10
A
IOZL
Three-State Leakage Current5, 9
@ VDD = max, VIN = 0 V
10
A
IOZHP
Three-State Leakage Current
9
@ VDD = max, VIN = VDD max
350
A
IOZLC
Three-State Leakage Current
7
@ VDD = max, VIN = 0 V
1.5
mA
IOZLA
Three-State Leakage Current
10
@ VDD = max, VIN = 1.5 V
350
A
IOZLAR
Three-State Leakage Current
8
@ VDD = max, VIN = 0 V
4.2
mA
IOZLS
Three-State Leakage Current
6
@ VDD = max, VIN = 0 V
150
A
CIN
Input Capacitance
11, 12
fIN = 1 MHz, TCASE = 25
°C, V
IN = 2.5 V
4.7
pF
NOTES
11Applies to output and bidirectional pins: DATA
47-0, ADDR31-0, MS3-0, RD, WR, PAGE, ADRCLK, SW, ACK, FLAG3-0, TIMEXP, HBG, REDY, DMAG1,
DMAG2, BR
6-1, CPA, DT0, DT1, TCLK0, TCLK1, RCLK0, RCLK1, TFS0, TFS1, RFS0, RFS1, LxDAT 3-0, LxCLK, LxACK, BMS, TDO, EMU, ICSA.
12See “Output Drive Currents” for typical drive current capabilities.
13Applies to input pins:
SBTS, IRQ
2-0, HBR, CS, DMAR1, DMAR2, ID2-0, RPBA, EBOOT, LBOOT, CLKIN, RESET, TCK.
14Applies to input pins with internal pull-ups: DR0, DR1,
TRST, TMS, TDI.
15Applies to three-statable pins: DATA
47-0, ADDR31-0, MS3-0, RD, WR, PAGE, ADRCLK, SW, ACK, FLAG3-0, REDY, HBG, DMAG1, DMAG2, BMS, BR6–1,
TFSX, RFSX, TDO, EMU. (Note that ACK is pulled up internally with 2 k
during reset in a multiprocessor system, when ID
2-0 = 001 and another ADSP-21060 is
not requesting bus mastership.)
16Applies to three-statable pins with internal pull-ups: DT0, DT1, TCLK0, TCLK1, RCLK0, RCLK1.
17Applies to
CPA pin.
18Applies to ACK pin when pulled up. (Note that ACK is pulled up internally with 2 k
during reset in a multiprocessor system, when ID
2-0 = 001 and another
ADSP-21060 is not requesting bus mastership).
19Applies to three-statable pins with internal pull-downs: LxDAT
3-0, LxCLK, LxACK.
10Applies to ACK pin when keeper latch enabled.
11Applies to all signal pins.
12Guaranteed but not tested.
Specifications subject to change without notice.
ADSP-21060C/ADSP-21060LC
REV. B
–13–
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