參數(shù)資料
型號: ADSP-21060LCWZ-160
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字信號處理
英文描述: 48-BIT, 40 MHz, OTHER DSP, CQFP240
封裝: THERMALLY ENHANCED, METRIC, HEAT SINK, CERAMIC, QFP-240
文件頁數(shù): 46/48頁
文件大小: 481K
代理商: ADSP-21060LCWZ-160
ADSP-21060C/ADSP-21060LC
–7–
REV. B
IOP REGISTERS
NORMAL WORD ADDRESSING
0x0000 0000
0x0002 0000
0x0004 0000
0x0008 0000
0x0010 0000
0x0018 0000
0x0020 0000
0x0028 0000
0x0030 0000
0x0038 0000
INTERNAL
MEMORY
SPACE
0x003F FFFF
SHORT WORD ADDRESSING
INTERNAL MEMORY SPACE
OF ADSP-2106x
WITH ID=001
INTERNAL MEMORY SPACE
OF ADSP-2106x
WITH ID=011
INTERNAL MEMORY SPACE
OF ADSP-2106x
WITH ID=100
INTERNAL MEMORY SPACE
OF ADSP-2106x
WITH ID=101
INTERNAL MEMORY SPACE
OF ADSP-2106x
WITH ID=110
BROADCAST WRITE
TO ALL
ADSP-2106xs
MULTIPROCESSOR
MEMORY SPACE
NORMAL WORD ADDRESSING: 32-BIT DATA WORDS
48-BIT INSTRUCTION WORDS
SHORT WORD ADDRESSING: 16-BIT DATA WORDS
INTERNAL MEMORY SPACE
OF ADSP-2106x
WITH ID=010
MS0
BANK 0
0x0040 0000
0xFFFF FFFF
BANK 1
BANK 2
DRAM
(OPTIONAL)
BANK 3
NONBANKED
MS1
MS2
MS3
BANK SIZE IS
SELECTED BY
MSIZE BIT FIELD OF
SYSCON
REGISTER.
EXTERNAL
MEMORY
SPACE
Figure 4. ADSP-21060C/ADSP-21060LC Memory Map
CBUG and SHARCPAC are trademarks of Analog Devices, Inc.
EZ-LAB is a registered trademark of Analog Devices, Inc.
DEVELOPMENT TOOLS
The ADSP-21060C is supported with a complete set of software
and hardware development tools, including an EZ-ICE In-
Circuit Emulator, EZ-Kit, and development software. The
SHARC EZ-Kit is a complete low cost package for DSP evalua-
tion and prototyping. The EZ-Kit contains a PC plug-in card
(EZ-LAB
) with an ADSP-21062 (5 V) processor. The EZ-Kit
also includes an optimizing compiler, assembler, instruction
level simulator, run-time libraries, diagnostic utilities and a
complete set of example programs.
Analog Devices ADSP-21000 Family Development Software
includes an easy to use Assembler based on an algebraic syntax,
Assembly Library/Librarian, Linker, instruction-level Simulator,
an ANSI C optimizing Compiler, the CBug C Source—Level
Debugger and a C Runtime Library including DSP and math-
ematical functions. The ADSP-21000 Family Development
Software is available for both the PC and Sun platforms.
The ADSP-2106x EZ-ICE Emulator uses the IEEE 1149.1 JTAG
test access port of the ADSP-2106x processor to monitor and
control the target board processor during emulation. The EZ-ICE
provides full-speed emulation, allowing inspection and modifi-
cation of memory, registers, and processor stacks. Nonintrusive
in-circuit emulation is assured by the use of the processor’s
JTAG interface—the emulator does not affect target system
loading or timing.
Further details and ordering information are available in the
ADSP-21000 Family Hardware and Software Development Tools
data sheet (ADDS-210xx-TOOLS). This data sheet can be
requested from any Analog Devices sales office or distributor.
In addition to the software and hardware development tools
available from Analog Devices, third parties provide a wide
range of tools supporting the SHARC processor family. Hard-
ware tools include SHARC PC plug-in cards multiprocessor
SHARC VME boards, and daughter and modules with multiple
SHARCs and additional memory. These modules are based on
the SHARCPAC module specification. Third Party software
tools include an Ada compiler, DSP libraries, operating systems
and block diagram design tools.
ADDITIONAL INFORMATION
This data sheet provides a general overview of the ADSP-21060C
architecture and functionality. For detailed information on the
ADSP-21000 Family core architecture and instruction set, refer to
the ADSP-2106x SHARC User’s Manual, Second Edition.
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