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REVISION HISTORY
7560 GROUP DATA SHEET
Rev.
Date
Description
Page
Summary
(2/3)
2.0
01/28/03
15
16
16
16
16
20
21
22
23
24
25
26
26
27
27
28
29
30
30
31
31
32
32
34
36
36
37
40
40
41
42
43
46
50
51
52
52
54
55
Figure 12 is partly revised.
Explanations of “Direcion Registers” of “I/O PORTS” are partly revised.
Explanations of “Pull-up Control” of “I/O PORTS” are partly revised.
Figure 13 is added.
Figure 14 is added.
Figure 16 is partly revised.
Figure 17 is partly revised.
Figure 18 is partly revised.
Figure 19 is partly revised.
Explanations of “INTERRUPTS” are partly added.
Explanations of “
I
Notes on interrupts” are partly revised.
Explanations of “Key Input Interrupt (Key-on Wake Up)” are partly revised.
Figure 22 is partly revised.
Explanations of “Key Input Interrupt (Key-on Wake Up)” are added.
Figure 23 is added.
Figure 24 is partly revised.
Explanations of “Timer X” are partly added.
Explanations of “Timer Y” are partly added.
Explanations of “(2) Period measurement mode” of “Timer Y” are partly revised.
Explanations of “Timer 1, Timer 2, Timer 3” are partly added.
Explanations of “
G
Timer 2 Write Control” are partly added,
Explanations of “(1) Clock Synchronous Serial I/O Mode” are partly added.
Note of Figure 29 is partly added.
Explanations of “[UART Control Register (UARTON)] are partly revised.
Explanations of “Serial I/O2” are partly added.
Explanations of “[Serial I/O2 Control Register (SIO2CON)]” are partly added.
“
G
Serial I/O2 Operating” is added.
Explanations of “[A-D Control Register (ADCON)]” are partly added.
Figure 40 is partly added.
Figure 42 is partly added.
Figure 44 is partly added.
Figure 45 is added.
Explanations of “Voltage Multiplier (3 Times)” are partly revised.
Explanation of “Watchdog Timer” are partly revised.
Figure 55 is partly revised.
Explanations of “RESET CIRCUIT” are partly revised.
Figure 56 is partly revised.
Explanations of “(2) Wait mode” are partly revised.
Figure 61 is partly revised.