- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360517 > 7560 7560 Group Datasheet Datasheet 1682K/JAN.14.03 PDF資料下載
參數(shù)資料
| 型號(hào)： | 7560 |
| 英文描述： | 7560 Group Datasheet Datasheet 1682K/JAN.14.03 |
| 中文描述： | 7560組數(shù)據(jù)表數(shù)據(jù)表1682K/JAN.14.03 |
| 文件頁(yè)數(shù)： | 34/90頁(yè) |
| 文件大?。?/td> | 1682K |
| 代理商： | 7560 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)當(dāng)前第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
7560 Group
33
(2) Asynchronous Serial I/O (UART) Mode
Clock asynchronous serial I/O mode (UART) is selected by setting
the serial I/O1 mode selection bit of the serial I/O1 control register
to
“
0
”
.
Eight serial data transfer formats can be selected, and the transfer
formats used by a transmitter and receiver must be identical.
The transmit and receive shift registers each have a buffer regis-
ter, but the two buffers have the same address (0018
16
) in
memory. Since the shift register cannot be written to or read from
directly, transmit data is written to the transmit buffer, and receive
data is read from the receive buffer.
The transmit buffer can also hold the next data to be transmitted
during transmitting, and the receive buffer register can hold re-
ceived one-byte data while the next one-byte data is being re-
ceived.
Fig. 30 Block diagram of UART serial I/O1
Fig. 31 Operation of UART serial I/O1 function
X
IN
1/4
O
r
E
l
e
P
E F
E
1/16
1
/
1
6
Data bus
R
l
e
e
c
c
t
e
o
i
n
v
e
b
i
b
t
u
f
f
e
r
r
e
g
i
s
t
e
r
A
d
d
r
e
s
s
0
0
1
8
1
6
Receive shift register
R
R
e
e
c
c
e
e
i
i
v
v
e
e
b
i
n
u
t
f
e
f
e
r
r
u
f
p
u
l
l
r
f
e
l
a
q
g
u
e
(
R
s
B
F
)
r
t
t
B
a
u
d
Address 001C
16
r
a
t
e
g
e
n
e
r
a
t
o
r
F
r
e
q
u
e
n
c
y
d
i
v
i
s
i
o
n
r
a
t
i
o
1
/
(
n
+
1
)
S
T
/
S
P
/
P
A
g
e
n
e
r
a
t
o
r
Transmit buffer register
D
a
t
a
b
u
s
T
r
a
n
s
m
i
t
s
h
i
f
t
r
e
g
i
s
t
e
r
Address 0018
16
T
r
a
n
s
m
i
t
s
h
i
f
t
r
e
g
i
s
t
e
r
s
h
i
f
t
c
o
m
p
l
e
t
i
o
n
f
l
a
g
(
T
S
C
)
T
s
r
u
a
r
n
e
s
g
m
i
s
i
e
t
r
b
u
Address 0019
16
f
f
e
r
e
m
p
t
y
f
l
a
g
(
T
B
E
)
Transmit interrupt request
S
T
d
e
t
e
c
t
o
r
SP detector
U
A
R
T
c
o
Address 001B
16
n
t
r
o
l
r
e
g
i
s
t
e
r
Character length selection bit
A
d
d
r
e
s
s
0
0
1
A
1
6
B
R
G
c
o
u
n
t
s
o
u
r
c
e
s
e
l
e
c
t
i
o
n
b
i
t
Transmit interrupt source selection bit
S
e
r
i
a
l
I
/
O
1
s
y
n
c
h
r
o
n
i
z
a
t
i
o
n
c
l
o
c
k
s
e
l
e
c
t
i
o
n
b
i
t
Clock control circuit
C
h
a
r
a
c
t
e
n
g
t
h
s
e
i
7
b
i
t
s
8
b
i
t
s
S
e
r
i
a
l
I
/
O
1
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
P4
6
/S
CLK1
S
e
r
i
a
l
I
/
O
1
s
t
a
t
t
P4
4
/R
X
D
P4
5
/T
X
D
T
T
S
B
C
E
=
=
“
“
0
1
”
”
R
B
F
=
“
0
”
T
B
E
=
“
0
”
TBE =
“
0
”
R
B
F
=
“
1
”
RBF =
“
1
”
S
T
D
0
D
1
S
P
D
0
D
1
ST
S
P
T
B
E
=
“
1
”
TSC =
“
1
”
ST
D
0
D
1
SP
D
0
D
1
S
T
S
P
Transmit buffer register write signal
Generated at 2nd bit in 2-stop-bit mode
1 start bit
7 or 8 data bits
1 or 0 parity bit
1 or 2 stop bit (s)
1
2
3
:
E
T
S
a
I
r
h
e
f
/
O
r
o
e
l
e
t
e
1
r
f
e
t
t
h
c
l
a
r
t
g
i
a
h
e
o
n
l
d
r
r
o
e
/
s
a
l
t
e
1
r
i
s
r
e
c
a
m
g
t
r
l
i
e
I
i
t
i
s
o
n
c
/
O
s
t
e
o
i
1
i
r
.
c
e
t
f
t
c
u
i
r
a
o
r
s
t
e
n
s
p
e
a
r
m
r
a
t
u
i
t
t
i
t
p
i
o
h
e
t
n
n
s
e
e
h
a
q
r
r
a
m
u
u
s
e
s
t
e
t
t
r
d
i
e
m
o
q
e
e
c
u
d
u
e
(
t
h
r
s
T
a
s
t
S
t
w
o
C
t
h
h
c
=
e
e
u
n
r
“
R
r
1
B
t
h
e
”
)
F
e
c
,
f
r
e
y
l
e
a
g
c
f
a
s
b
i
v
t
t
t
e
e
o
i
n
c
r
o
b
b
g
m
u
e
t
e
f
e
w
e
s
r
e
t
“
f
e
r
a
1
u
n
n
”
l
l
w
s
(
f
a
l
h
m
t
g
e
i
t
1
n
s
(
i
n
t
s
B
e
e
t
o
F
r
r
p
)
t
r
u
b
a
p
b
i
t
c
s
s
f
o
m
o
o
m
i
t
u
r
r
e
b
c
e
s
u
e
c
f
s
e
“
1
f
e
e
p
”
r
l
t
.
i
o
n
)
.
:
:
s
c
r
I
O
e
n
e
v
n
r
r
t
e
p
c
e
c
e
f
t
a
R
t
t
e
n
t
e
t
t
c
n
h
r
c
e
g
i
o
i
s
n
t
e
b
r
i
t
h
(
a
T
s
I
e
)
m
o
p
f
t
t
i
h
e
d
e
s
(
T
e
B
r
i
E
a
=
“
1
”
)
o
r
h
n
b
h
r
e
t
C
l
N
o
t
e
s
S
e
r
i
a
l
o
u
t
p
u
t
T
x
D
S
e
r
i
a
l
i
n
p
u
t
R
x
D
Receive buffer register read signal
Transmit or receive clock
(Notes 1, 2)
(Notes 1, 2)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 7561Z0001S13 | READER PANEL MOUNT |
| 7561Z0001S13LF | READER PANEL MOUNT |
| 7561Z0001S14 | READER PANEL MOUNT |
| 7561Z0001S14LF | READER PANEL MOUNT |
| 7561Z0001S15 | READER PANEL MOUNT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 7560 6 43 01 D | 制造商:Hummel 功能描述:Bulk |
| 7560 6 51 01 D | 制造商:Hummel 功能描述: |
| 7560_03 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 7560_0308 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Difference among various products |
| 7-5-600 | 功能描述:3M 600 SCOTCH TRANSPARENT FILM T 制造商:3m (tc) 系列:600 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:1 |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。