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參數資料
| 型號： | 7560 |
| 英文描述： | 7560 Group Datasheet Datasheet 1682K/JAN.14.03 |
| 中文描述： | 7560組數據表數據表1682K/JAN.14.03 |
| 文件頁數： | 48/90頁 |
| 文件大小： | 1682K |
| 代理商： | 7560 |
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
7560 Group
47
(divider division ratio for LCD)
(frequency of count source for LCDCK)
duty ratio
f(LCDCK)
Fig. 49 LCD display RAM map
Common Pin and Duty Ratio Control
The common pins (COM
0
–
COM
3
) to be used are determined by
duty ratio.
Select duty ratio by the duty ratio selection bits (bits 0 and 1 of the
LCD mode register).
After reset, the V
CC
(V
L3
) voltage is output from the common pins.
LCD Display RAM
Addresses 0040
16
to 0053
16
are the designated RAM for the LCD
display. When
“
1
”
are written to these addresses, the correspond-
ing segments of the LCD display panel are turned on.
LCD Drive Timing
The frequency of internal signal LCDCK decided LCD drive timing
and the frame frequency can be determined with the following
equation:
Table 13 Duty ratio control and common pins used
Duty
ratio
2
3
4
Common pins used
Notes 1:
COM
2
and COM
3
are open.
2:
COM
3
is open.
Bit 1
0
1
1
Bit 0
1
0
1
COM
0
, COM
1
(Note 1)
COM
0
–
COM
2
(Note 2)
COM
0
–
COM
3
Duty ratio selection bits
Segment Signal Output Pins
Segment signal output pins are classified into the segment-only
pins (SEG
0
–
SEG
17
), the segment or output port pins (SEG
18
–
SEG
25
), and the segment or I/O port pins (SEG
26
–
SEG
39
).
Segment signals are output according to the bit data of the LCD
RAM corresponding to the duty ratio. After reset, a V
CC
(=V
L3
)
voltage is output to the segment-only pins and the segment/out-
put port pins are the high impedance condition and pulled up to
V
CC
(=V
L3
) voltage.
Also, the segment/I/O port pins(SEG
26
–
SEG
39
) are set to input
mode as I/O ports, and V
CC
(=V
L3
) is applied to them by pull-up
resistor.
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
5
5
5
5
0
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
1
A
1
B
1
C
1
D
1
E
1
F
1
0
1
1
1
2
1
3
1
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
B
i
t
A
d
d
r
e
s
s
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
G
1
G
3
G
5
G
7
G
9
G
1
G
1
G
1
G
1
G
1
G
2
G
2
G
2
G
2
G
2
G
3
G
3
G
3
G
3
G
3
1
3
5
7
9
1
3
5
7
9
1
3
5
7
9
7
6
5
4
3
2
1
0
C
O
M
3
C
O
M
0
C
O
M
2
C
O
M
1
C
O
M
0
COM
3
COM
2
C
O
M
1
SEG
0
SEG
2
SEG
4
SEG
6
SEG
8
SEG
10
SEG
12
SEG
14
SEG
16
SEG
18
SEG
20
SEG
22
SEG
24
SEG
26
SEG
28
SEG
30
SEG
32
SEG
34
SEG
36
SEG
38
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