參數(shù)資料
型號(hào)： 7560
英文描述： 7560 Group Datasheet Datasheet 1682K/JAN.14.03
中文描述： 7560組數(shù)據(jù)表數(shù)據(jù)表1682K/JAN.14.03
文件頁數(shù)： 33/90頁
文件大小： 1682K
代理商： 7560
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
7560 Group
32
SERIAL I/O
Serial I/O1
Serial I/O1 can be used as either clock synchronous or asynchro-
nous (UART) serial I/O. A dedicated timer (baud rate generator) is
also provided for baud rate generation.
(1) Clock Synchronous Serial I/O Mode
Clock synchronous serial I/O mode is selected by setting the se-
rial I/O1 mode selection bit of the serial I/O1 control register to
“
1
”
.
For clock synchronous serial I/O mode, the transmitter and the re-
ceiver must use the same clock as an operation clock.
When an internal clock is selected as an operation clock, transmit
or receive is started by a write signal to the transmit buffer regis-
ter.
When an external clock is selected as an operation clock, serial I/
O1 becomes the state where transmit or receive can be performed
by a write signal to the transmit buffer register. Transmit and re-
ceive are started by input of an external clock.
Fig. 28 Block diagram of clock synchronous serial I/O1
Fig. 29 Operation of clock synchronous serial I/O1 function
P
4
6
/
S
C
L
K
1
P
4
7
/
S
R
D
Y
1
P
4
4
/
R
X
D
P4
5
/T
X
D
X
I
N
1
/
4
1/4
F
/
F
Serial I/O1 status register
Serial I/O1 control register
R
e
c
e
i
v
e
b
u
f
f
e
r
r
e
g
i
s
t
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r
A
d
d
r
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s
s
0
0
1
8
1
6
Receive shift register
Receive buffer full flag (RBF)
R
e
c
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i
v
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i
n
t
e
r
r
u
p
t
r
e
q
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s
t
Receive clock control circuit
S
h
i
f
t
c
l
o
c
k
Serial I/O1 synchronous
clock selection bit
Frequency division ratio 1/(n+1)
Baud rate generator
A
d
d
r
e
s
s
0
0
1
C
1
6
BRG count source selection bit
F
a
l
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-
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d
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d
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t
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c
t
o
r
Data bus
Address 0018
16
S
h
i
f
t
c
l
o
c
k
Transmit shift register shift completion flag (TSC)
Transmit interrupt source selection bit
Transmit buffer empty flag (TBE)
Address 0019
16
T
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s
m
i
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Data bus
A
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6
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Receive enable signal S
RDY1
D
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
RBF =
“
1
”
TSC =
“
1
”
v
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r
r
u
d
e
t
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c
t
TBE =
“
0
”
TBE =
“
1
”
TSC =
“
0
”
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s
“
1
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.
D
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
(N
o
t
e
1
)
(Note 3)
(Note 2)
(Note 3)
(Note 4)
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