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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
7560 Group
36
Serial I/O2
Serial I/O2 can be used only for clock synchronous serial I/O.
For serial I/O2, the transmitter and the receiver must use the
same clock as a synchronous clock. When an internal clock is se-
lected as a synchronous clock, the serial I/O2 is initialized and,
transmit and receive is started by a write signal to the serial I/O2
register.
When an external clock is selected as an synchronous clock, the
serial I/O2 counter is initialized by a write signal to the serial I/O2
register, serial I/O2 becomes the state where transmission or re-
ception can be performed. Write to the serial I/O2 register while
S
CLK21
is
“
H
”
state when an external clock is selected as an syn-
chronous clock.
Either P6
2
/S
CLK21
or P6
3
/S
CLK22
pin can be selected as an output
pin of the synchronous clock. In this case, the pin that is not se-
lected as an output pin of the synchronous clock functions as a I/
O port.
[Serial I/O2 Control Register (SIO2CON)] 001D16
The serial I/O2 control register contains eight control bits for the
serial I/O2 functions. After setting to this register, write data to the
serial I/O2 register and start transmit and receive.
Fig. 33 Structure of serial I/O2 control register
Fig. 34 Block diagram of serial I/O2 function
S
(
S
e
r
O
i
a
2
l
C
I
/
O
O
2
N
c
:
o
a
n
d
t
r
d
o
r
l
r
s
e
s
g
i
s
0
t
e
1
r
D
1
6
)
I
e
0
b7
Internal synchronous clock select bits
b2 b1 b0
0 0 0: f(X
IN
)/8
0 0 1: f(X
IN
)/16
0 1 0: f(X
IN
)/32
0 1 1: f(X
IN
)/64
1 0 0:
1 0 1:
1 1 0: f(X
IN
)/128
1 1 1: f(X
IN
)/256
Serial I/O2 port selection bit
0: I/O port
1: S
OUT2
,S
CLK21
/S
CLK22
signal output
P6
1
/S
OUT2
P-channel output disable bit
0: CMOS output (in output mode)
1: N-channel open-drain output
(in output mode)
Transfer direction selection bit
0: LSB first
1: MSB first
Serial I/O2 synchronous clock selection bit
0: External clock
1: Internal clock
Synchronous clock output pin selection bit
0: S
CLK21
1: S
CLK22
b
0
D
o
n
o
t
s
e
l
e
c
t
X
I
N
“
1
”
“
0
”
“
0
”
“
1
”
“
0
”
“
1
s
”
S
C
L
K
2
(N
o
t
e
)
1
1
1
1
1
1
/
/
/
/
/
/
8
1
3
6
1
2
6
2
4
2
5
8
6
D
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/
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r
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/
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2
p
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c
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b
i
t
S
e
r
i
a
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I
/
O
2
c
o
u
n
t
e
r
(
3
)
S
e
r
i
a
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I
/
O
2
r
e
g
i
s
t
e
r
(
8
)
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y
n
c
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r
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u
s
c
i
r
c
u
i
t
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r
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I
c
/
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c
k
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u
b
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E
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t
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c
k
In
c
t
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c
r
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n
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s
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c
h
b
r
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u
s
l
t
i
D
v
i
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e
r
P
6
3
l
a
t
c
h
P
6
3
/
S
C
L
K
2
2
P
6
2
/
S
C
L
K
2
1
P
6
1
/
S
O
U
T
2
P
6
0
/
S
I
N
2
P
6
2
l
a
t
c
h
P
6
1
l
a
t
c
h
(N
o
t
e
)
N
o
t
e
:
I
s
s
t
y
e
i
s
n
l
e
c
s
h
c
e
r
t
i
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o
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e
c
n
n
t
o
b
e
u
i
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s
t
.
b
c
y
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t
c
h
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k
o
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u
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r
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t
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p
/
O
i
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2
s
e
y
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e
c
c
h
t
i
r
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n
b
o
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,
s
a
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d
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c
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h
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r
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i
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/
b
2
i
t
,
p
t
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r
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O