參數(shù)資料
型號(hào): TUSB5052B
廠商: Texas Instruments, Inc.
英文描述: USB to 2-Serial + 1-Parallel Controller With Configurable Optional Hub
中文描述: USB轉(zhuǎn)2 -串行接口1 -可配置可選并行控制器集線器
文件頁數(shù): 48/84頁
文件大小: 276K
代理商: TUSB5052B
6–8
Stop Transfer:
The host notifies the MCU (via control-end-point) to stop the transfer. Under this
condition, the MCU sets EN = 0 in the DMACDR register.
Partial-Packet:
Device-receiver has no data to be transferred to host. Under this condition, the
byte-count value is less than 64 when the transaction-timer time-out occurs. When the DMA detects this
condition, it sets TXFT = 1 and OVRUN =0, updates the byte-count and NAK-bit (partial-packet) in the
IEDB, and interrupts the MCU. UBM transfers the partial packet to host.
Buffer-Overrun:
The
host is busy, X and Y-buffers are full (X-NAK = 0 and Y-NAK = 0) and the DMA
cannot write to these buffers. The transaction time-out stops the DMA transfer, the DMA sets TXFT =1
and OVRUN =1, and interrupts the MCU.
UART Error Condition:
When receiving from a UART, a receiver-error condition stops the DMA and
sets TXFT = 1 and OVRUN = 0, but the EN-bit remains set at 1. Therefore, the DMA does not interrupt
the MCU. However, the UART generates a status interrupt, notifying the MCU that an error condition
has occurred.
OUT Transaction (Host to TUSB5152):
1.
The MCU initializes the OEDB (64-byte packet, and double-buffering is used) and the following DMA
registers:
DMACSR: Defines the transaction time-out value.
DMACDR: Defines the OEDB being used, and the DMA mode of operation (continuous-mode). Once
the EN bit is set to 1 in this register, the transfer starts.
2.
The UBM transfers data from host to X-buffer. When a block of 64-bytes is transferred, the UBM updates
the byte-count and sets NAK = 1 in OEDB (indicating to DMA that the X-buffer is ready to be transferred
to UART/PPT). The DMA starts X-buffer transfer using the byte-count value in OEDB. The UBM continues
transferring data from host to Y-buffer. At the end of the block transfer, the UBM updates the byte-count and
sets NAK = 1 in OEDB (indicating to DMA that the Y-buffer is ready to be transferred to device). The DMA
continues the transfer from the X/Y-buffers to the device, alternating between X and Y buffers without MCU
intervention.
3.
Transfer termination: As mentioned, the DMA/UBM continues the data transfer alternating between X and
Y buffers. The termination of the transfer can happen under the following conditions:
Stop Transfer:
The host notifies the MCU (via control-end-point) to stop the transfer. Under this
condition, the MCU sets EN = 0 in the DMACDR register.
Partial-Packet:
UBM receives a partial packet from host. Under this condition, the byte-count value is
less than 64 and the transaction-timer does nottime out. When the DMA detects this condition, it
transfers the partial packet to the device, sets TXFT = 0 and PPKT = 1, updates NAK = 0 in OEDB, and
interrupts the MCU.
Timeout:
The
device is busy, X and Y-buffers are full (X-NAK = 1 and Y-NAK = 1) and the UBM cannot
write to these buffers. Under this condition the transaction-timer time-out stops the DMA transfer, sets
TXFT = 1 and OVRUN = 0, and interrupts the MCU.
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