
4–2
4.1
Miscellaneous Registers
4.1.1
ROMs: ROM Shadow Configuration Register
This register is used by the MCU to switch from boot mode to normal operation mode (boot mode is set on
power-on-reset only). In addition, this register provides the device revision number and the ROM/RAM configuration.
ROA
S1
S0
R3
R2
R1
R0
SDW
7
6
5
4
3
2
1
0
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/W
BIT
0
NAME
SDW
RESET
FUNCTION
0
This bit enables/disables boot ROM. (Shadow the ROM)
SDW = 0
When clear, the MCU executes from the 6K boot–ROM space. The boot ROM appears in
two locations: 0000 and 8000h. The 16K RAM is mapped to XDATA space; therefore,
read/write operation is possible. This bit is set by the MCU after the RAM load is com-
pleted. MCU cannot clear this bit; it is cleared on power-up-reset or function-reset.
SDW = 1
When set by the MCU, the 6K boot-ROM maps to location 8000h, and the 16K RAM is
mapped to code space, starting at location 0000h. At this point, the MCU executes from
RAM, and the write operation is disabled (no write operation is possible in code space).
These bits reflect the device revision number
Code space size. These bits define the ROM or RAM code-space size (ROA bit defines ROM or
RAM). These bits are permanently set and are not affected by reset (see Table 4–1)
00 = 4K bytes code space size
01 = 8K bytes code space size
10 = 16K bytes code space size
11 = 32K bytes code space size
4–1
6–5
R[3:0]
S[1:0]
No effect
No effect
7
ROA
No affect
ROM or RAM version. This bit indicates whether the code space is RAM or ROM based. This bit is
permanently set and is not affected by reset (see Table 4–1)
ROA = 0 Code space is ROM
ROA = 1 Code space is RAM
Table 4–1. ROM/RAM Size Defintion Table
ROMS REGISTER
Boot ROM
Boot-ROM
RAM CODE
ROM CODE
ROA
S1
S0
0
0
0
None
None
4K
0
0
1
None
None
8K
0
1
0
None
None
16K (reserved)
0
1
1
None
None
32K (reserved)
1
0
0
6K
4K
None
1
0
1
6K
8K
None
1
1
0
6K
16K
None
1
1
1
6K
32K (reserved)
None
4.1.2
Boot Operation (MCU Firmware Loading)
Since the code space is in RAM (with the exception of the boot ROM), the TUSB5152 firmware must be loaded from
an external source. Two sources are available for booting: one from an external serial E
2
PROM connected to the I
2
C
bus, and the other from the host via the USB. On device reset, the SDW bit (in ROMS register) and CONT bit (in
USBCTL: USB control register) are cleared. This configures the memory space to boot-mode(see Memory-Map) and
keeps the device disconnectedfrom the host. The first instruction is fetched from location 0000h (which is in the
6K-ROM). The 16K-RAM is mapped to XDATA space (location 0000h). The MCU executes a read from an external
E
2
PROM and tests whether it contains the code (by testing for boot-signature). If it contains the code, the MCU reads
from E
2
PROM and writes to the 16K-RAM in XDATA space. If it does not contain the code, the MCU proceeds to boot
from the USB.