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P
TMS320DM6446
Digital Media System on-Chip
SPRS283–DECEMBER 2005
Table 2-15. I2C Terminal Functions
SIGNAL
NAME
IPD/
IPU
(2)
TYPE
(1)
DESCRIPTION
NO.
I2C
SCL/
GPIO43
This pin is multiplexed between I2C and GPIO. For I2C, it is clock output SCL.
For GPIO, it is GPIO43.
This pin is multiplexed between I2C and GPIO. For I2C, it is bi-directional data
signal SDA.
For GPIO, it is GPIO44.
C4
I/O/Z
IPD
SDA/
GPIO44
B4
I/O/Z
IPD
(1)
(2)
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal
IPD = Internal pulldown, IPU = Internal pullup. (To pull up a signal to the opposite supply rail, a 1-k
resistor should be used.)
Table 2-16. Audio Serial Port (ASP) Terminal Functions
SIGNAL
NAME
IPD/
IPU
(2)
TYPE
(1)
DESCRIPTION
NO.
Audio Serial Port (ASP)
This pin is multiplexed between ASP and GPIO. For ASP, it is Transmit clock IO
CLKX.
For GPIO, it is GPIO29.
This pin is multiplexed between ASP and GPIO. For ASP, it is Receive clock IO
CLKR.
For GPIO, it is GPIO30
This pin is multiplexed between ASP and GPIO. For ASP, it is Transmit frame
synchronization IO FSX.
For GPIO, it is GPIO31.
This pin is multiplexed between ASP and GPIO. For ASP, it is Receive frame
synchronization IO FSR.
For GPIO, it is GPIO32.
This pin is multiplexed between ASP and GPIO. For ASP, it is Data Transmit
output DX.
For GPIO, it is GPIO33.
This pin is multiplexed between ASP and GPIO. For ASP, it is Data Receive input
DR.
For GPIO, it is GPIO34.
CLKX/
GPIO29
B8
I/O/Z
IPD
CLKR/
GPIO30
A8
I/O/Z
IPD
FSX/
GPIO31
C8
I/O/Z
IPD
FSR/
GPIO32
C7
I/O/Z
IPD
DX/
B7
I/O/Z
IPD
GPIO33
DR/
A7
I/O/Z
IPD
GPIO34
(1)
(2)
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal
IPD = Internal pulldown, IPU = Internal pullup. (To pull up a signal to the opposite supply rail, a 1-k
resistor should be used.)
Table 2-17. SPI Terminal Functions
SIGNAL
NAME
IPD/
IPU
(2)
TYPE
(1)
DESCRIPTION
NO.
Serial Port Interface (SPI)
This pin is multiplexed between SPI and GPIO. When used by SPI, it is SPI slave
device 0 enable output SPI_EN0.
For GPIO, it is GPIO37.
This pin is multiplexed between SPI, ATA, and GPIO. When used by SPI, it is SPI
slave device 1 enable output SPI_EN1.
For ATA, it is buffer direction control output HDDIR.
For GPIO, it is GPIO42.
This pin is multiplexed between SPI and GPIO. For SPI, it is clock output
SPI_CLK.
For GPIO, it is GPIO39.
This pin is multiplexed between SPI and GPIO. For SPI, it is data input SPI_DI.
For GPIO, it is GPIO40.
SPI_EN0/
GPIO37
A4
I/O/Z
IPD
SPI_EN1/
HDDIR/
GPIO42
B2
I/O/Z
IPD
SPI_CLK/
GPIO39
A3
I/O/Z
IPD
SPI_DI/
GPIO40
B3
I/O/Z
IPD
(1)
(2)
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal
IPD = Internal pulldown, IPU = Internal pullup. (To pull up a signal to the opposite supply rail, a 1-k
resistor should be used.)
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