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TMS320DM6446
Digital Media System on-Chip
SPRS283–DECEMBER 2005
Table 5-80. Ethernet MAC (EMAC) Control Registers (continued)
HEX ADDRESS RANGE
01C8 0620
01C8 0624
01C8 0628
01C8 062C
01C8 0630
01C8 0634
01C8 0638
01C8 063C
ACRONYM
RX0HDP
RX1HDP
RX2HDP
RX3HDP
RX4HDP
RX5HDP
RX6HDP
RX7HDP
REGISTER NAME
Receive Channel 0 DMA Head Descriptor Pointer Register
Receive Channel 1 DMA Head Descriptor Pointer Register
Receive Channel 2 DMA Head Descriptor Pointer Register
Receive Channel 3 DMA Head Descriptor Pointer Register
Receive Channel 4 DMA Head Descriptor Pointer Register
Receive Channel 5 DMA Head Descriptor Pointer Register
Receive Channel 6 DMA Head Descriptor Pointer Register
Receive Channel 7 DMA Head Descriptor Pointer Register
Transmit Channel 0 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 1 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 2 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 3 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 4 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 5 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 6 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 7 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 0 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 1 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 2 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 3 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 4 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 5 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 6 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 7 Completion Pointer (Interrupt Acknowledge)
Register
Reserved
01C8 0640
TX0CP
01C8 0644
TX1CP
01C8 0648
TX2CP
01C8 064C
TX3CP
01C8 0650
TX4CP
01C8 0654
TX5CP
01C8 0658
TX6CP
01C8 065C
TX7CP
01C8 0660
RX0CP
01C8 0664
RX1CP
01C8 0668
RX2CP
01C8 066C
RX3CP
01C8 0670
RX4CP
01C8 0674
RX5CP
01C8 0678
RX6CP
01C8 067C
RX7CP
01C8 0680 - 02C8 0FFF
–
Table 5-81. EMAC Statistics Registers
HEX ADDRESS RANGE
01C8 0200
ACRONYM
RXGOODFRAMES
REGISTER NAME
Good Receive Frames Register
Broadcast Receive Frames Register
(Total number of good broadcast frames received)
Multicast Receive Frames Register
(Total number of good multicast frames received)
Pause Receive Frames Register
Receive CRC Errors Register (Total number of frames received with
CRC errors)
01C8 0204
RXBCASTFRAMES
01C8 0208
RXMCASTFRAMES
01C8 020C
RXPAUSEFRAMES
01C8 0210
RXCRCERRORS
Peripheral and Electrical Specifications
195