
Data Sheet
June 2002
TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
217
Agere Systems Inc.
11 M13/M23 MUX/DeMUX Registers
(continued)
Table 266. M13_RDL_DATA_R, Receive Data-Link Data (RO)
Table 267. M13_RDL_FRAME_SIZE_R, Receive Data-Link Frame Size (RO)
Table 268. M13_RHDLC_STATUS_R, Receive High-Level Data-Link Control Status (RO)
Address
Bit
Name
Table 269. M13_DS2_FORCE_OOF_R, DS2 Force Out-Of-Frame (One Shot R/W)
Address
Bit
Name
Address
Bit
Name
Function
Reset
Default
0x00
0xXX
0x10053
15:8
7:0
RSVD
Reserved.
M13_RDL_DATA[7:0] Bytes received via the path maintenance data link are stored
in a 128-byte FIFO. They can be read out of the FIFO through
this register, M13_RDL_DATA_R. On reset, the FIFO is emp-
tied, and reading from this register returns an undetermined
value.
Address
Bit
Name
Function
Reset
Default
0x000
0x00
0x10054
15:7
6:0
RSVD
Reserved.
M13_RDL_FRAME_SIZE[6:0] The number of bytes in the frame modulo-128 is indi-
cated by this register. This is the number of bytes from
the frame that have been written into the FIFO, not the
number of bytes remaining in the FIFO. All bytes
between the opening flag and the FCS bytes are
included (unless M13_RDL_FCS (
Table 299 on
page 227
) is low, in which case the FCS bytes are
included in the count).
Function
Reset
Default
0x00
0x00
0x10055
15:8
7:0
RSVD
Reserved.
This register provides information on the earliest HDLC
frame still in the FIFO. A value of 1 in bit 7 indicates that
the closing flag or an abort byte for the current frame
has been received; a 1 in bit 6 indicates the current
frame is corrupted; bits 5 to 1 indicate the size of the
current frame modulo-32; and bit 0 is set to 1 if there
are less than 32 bytes of the earliest frame left in the
FIFO.
M13_RHDLC_STATUS[7:0]
Function
Reset
Default
0x000
0x00
0x10059
15:7
6:0
RSVD
Reserved.
M13_DS2_FORCE_OOF[7:1]
M13_DS2_FORCE_OOFy Bits.
When
M13_DS2_FORCE_OOFy transitions from 0 to 1, the
DS2 framer in M12 demultiplexer Y is forced out of
frame.