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參數(shù)資料
| 型號(hào)： | SYM53C825AE |
| 廠商： | LSI Corporation |
| 英文描述： | PCI-SCSI I/O Processor(PCI-SCSI I/O接口處理器) |
| 中文描述： | 的PCI -的SCSI I / O處理器（個(gè)PCI -的SCSI的I / O接口處理器） |
| 文件頁(yè)數(shù)： | 93/225頁(yè) |
| 文件大?。?/td> | 1237K |
| 代理商： | SYM53C825AE |
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SCSI Operating Registers
SYM53C825A/825AE Data Manual
5-19
Register 0D (8D)
SCSI Status Zero (SSTAT 0)
Read Only
Bit 7
ILF (SIDL Least Significant Byte
Full)
T his bit is set when the least significant byte in
the SCSI Input Data Latch register (SIDL)
contains data. Data is transferred from the
SCSI bus to the SCSI Input Data Latch regis-
ter before being sent to the DMA FIFO and
then to the host bus. T he SIDL register con-
tains SCSI data received asynchronously. Syn-
chronous data received does not flow through
this register.
Bit 6
ORF (SODR Least Significant Byte
Full)
T his bit is set when the least significant byte in
the SCSI Output Data Register (SODR, a hid-
den buffer register which is not accessible)
contains data. T he SODR register is used by
the SCSI logic as a second storage register
when sending data synchronously. It cannot be
read or written by the user. T his bit can be
used to determine how many bytes reside in
the chip when an error occurs.
Bit 5
OLF (SODL Least Significant Byte
Full)
T his bit is set when the least significant byte in
the SCSI Output Data Latch (SODL) contains
data. T he SODL register is the interface
between the DMA logic and the SCSI bus. In
synchronous mode, data is transferred from
the host bus to the SODL register, and then to
the SCSI Output Data Register (SODR, a hid-
den buffer register which is not accessible)
before being sent to the SCSI bus. In asyn-
chronous mode, data is transferred from the
host bus to the SODL register, and then to the
SCSI bus. T he SODR buffer register is not
used for asynchronous transfers. T his bit can
be used to determine how many bytes reside in
the chip when an error occurs.
Bit 4
AIP (Arbitration in Progress)
Arbitration in Progress (AIP = 1) indicates that
the SYM53C825A has detected a Bus Free
condition, asserted BSY, and asserted its SCSI
ID onto the SCSI bus.
Bit 3
LOA (Lost Arbitration)
When set, LOA indicates that the
SYM53C825A has detected a bus free condi-
tion, arbitrated for the SCSI bus, and lost arbi-
tration due to another SCSI device asserting
the SEL/ signal.
Bit 2
WOA (Won Arbitration)
When set, WOA indicates that the
SYM53C825A has detected a Bus Free condi-
tion, arbitrated for the SCSI bus, and won
arbitration. T he arbitration mode selected in
the SCNT L0 register must be full arbitration
and selection for this bit to be set.
Bit 1
RST / (SCSI RST / Signal)
T his bit reports the current status of the SCSI
RST / signal, and the RST signal (bit 6) in the
ISTAT register. T his bit is not latched and may
be changing as it is read.
Bit 0
SDP0/ (SCSI SDP0/ Parity Signal)
T his bit represents the active high current sta-
tus of the SCSI SDP0/ parity signal. T his signal
is not latched and may be changing as it is
read.
ILF
7
ORF
6
OLF
5
AIP
4
LOA
3
WOA
2
RST
1
SDP0/
0
Default>>>
0
0
0
0
0
0
0
0
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