參數(shù)資料
型號(hào)： SYM53C825AE
廠商： LSI Corporation
英文描述： PCI-SCSI I/O Processor(PCI-SCSI I/O接口處理器)
中文描述： 的PCI -的SCSI I / O處理器（個(gè)PCI -的SCSI的I / O接口處理器）
文件頁(yè)數(shù)： 147/225頁(yè)
文件大?。?/td> 1237K
代理商： SYM53C825AE
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Instruction Set of the I/O Processor
Transfer Control Instructions
SYM53C825A/825AE Data Manual
6-19
Jump/Call an Absolute Address
Start execution at the new absolute address.
Jump/Call a Relative Address
Start execution at the current address plus (or
minus) the relative offset.
T he SCRIPT S program counter is a 32-bit
value pointing to the SCRIPT currently being
executed by the SYM53C825A. T he next
address is formed by adding the 32-bit pro-
gram counter to the 24-bit signed value of the
last 24 bits of the Jump or Call instruction.
Because it is signed (twos compliment), the
jump can be forward or backward.
A relative transfer can be to any address within
a 16-MB segment. T he program counter is
combined with the 24-bit signed offset (using
addition or subtraction) to form the new exe-
cution address.
SCRIPT S programs may contain a mixture of
direct jumps and relative jumps to provide
maximum versatility when writing SCRIPT S.
For example, major sections of code can be
accessed with far calls using the 32-bit physical
address, then local labels can be called using
relative transfers. If a SCRIPT is written using
only relative transfers it would not require any
run time alteration of physical addresses, and
could be stored in and executed from a
PROM.
Bit 21
Carry Test
When this bit is set, decisions based on the
ALU carry bit can be made. True/False com-
parisons are legal, but Data Compare and
Phase Compare are illegal.
Bit 20
Interrupt on the Fly
When this bit is set, the interrupt instruction
will not halt the SCRIPT S processor. Once the
interrupt occurs, the Interrupt on the Fly bit
(ISTAT bit 2) will be asserted.
Bit 19
Jump If True/False
T his bit determines whether the
SYM53C825A should branch when a compar-
ison is true or when a comparison is false. T his
bit applies to phase compares, data compares,
and carry tests. If both the Phase Compare and
Data Compare bits are set, then both compares
must be true to branch on a true condition.
Both compares must be false to branch on a
false condition.
Bit 18
Compare Data
When this bit is set, the first byte received from
the SCSI data bus (contained in SFBR regis-
ter) is compared with the Data to be Com-
pared Field in the Transfer Control instruction.
T he Wait for Valid Phase bit controls when this
compare will occur. T he Jump if True/False bit
determines the condition (true or false) to
branch on.
Bit 17
Compare Phase
When the SYM53C825A is in initiator mode,
this bit controls phase compare operations.
When this bit is set, the SCSI phase signals
(latched by SREQ/) are compared to the Phase
Field in the Transfer Control instruction; if
they match, the comparison is true. T he Wait
for Valid Phase bit controls when the compare
will occur. When the SYM53C825A is operat-
ing in target mode this bit, when set, tests for
an active SCSI SAT N/ signal.
Command
Condition Codes
Absolute Alternate Address
Command
Condition Codes
Don’t Care
Alternate Jump Offset
Bit 19
Result of
Compare
Action
0
0
1
1
False
True
False
True
Jump Taken
No Jump
No Jump
Jump Taken
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