參數(shù)資料
型號: ST72371
廠商: 意法半導(dǎo)體
英文描述: 8-Bit MCUs with 16K ROM/OTP/EPROM, 512 Bytes RAM, ADC, DAC (PWM), Timer, IIC and SCI(8位微控制器(8M))
中文描述: 8 - 16K的光碟/雙層/存儲器,512字節(jié)RAM,ADC和DAC的器(PWM),定時(shí)器,IIC和脊髓損傷(8位微控制器(8米)位MCU)
文件頁數(shù): 79/94頁
文件大?。?/td> 642K
代理商: ST72371
79/94
ST72371/ST72372
ST7 ADDRESSING MODES
(Cont’d)
5.1.6 Indirect Indexed (Short, Long)
This is a combination of indirect and short indexed
addressing modes. The operand is referenced by
its memory address, which is defined by the un-
signed addition of an index register value (X or Y)
with a pointer value located in memory. The point-
er address follows the opcode.
The indirect indexed addressing mode consists of
two sub-modes:
Indirect Indexed (Short)
The pointer address is a byte, the pointer size is a
byte, thus allowing 00 - 1FE addressing space,
and requires 1 byte after the opcode.
Indirect Indexed (Long)
The pointer address is a byte, the pointer size is a
word, thus allowing 64 Kbyte addressing space,
and requires 1 byte after the opcode.
Table
Indexed,
Addressing Modes
24.
Instructions
Indirect
Supporting
Indirect
Direct,
Indexed
and
5.1.7 Relative mode (Direct, Indirect)
This addressing mode is used to modify the PC
register value, by adding an 8-bit signed offset to
it.
The relative addressing mode consists of two sub-
modes:
Relative (Direct)
The offset is following the opcode.
Relative (Indirect)
The offset is defined in memory, which address
follows the opcode.
Long and Short
Instructions
Function
LD
Load
CP
Compare
AND, OR, XOR
Logical Operations
ADC, ADD, SUB, SBC
Arithmetic Additions/Sub-
stractions operations
BCP
Bit Compare
Short Instructions Only
Function
CLR
Clear
INC, DEC
Increment/Decrement
TNZ
Test Negative or Zero
CPL, NEG
1 or 2 Complement
BSET, BRES
Bit Operations
BTJT, BTJF
Bit Test and Jump Opera-
tions
SLL, SRL, SRA, RLC,
RRC
Shift and Rotate Operations
SWAP
Swap Nibbles
CALL, JP
Call or Jump subroutine
Available Relative Direct/
Indirect Instructions
JRxx
Function
Conditional Jump
CALLR
Call Relative
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