參數(shù)資料
型號: ST72371
廠商: 意法半導(dǎo)體
英文描述: 8-Bit MCUs with 16K ROM/OTP/EPROM, 512 Bytes RAM, ADC, DAC (PWM), Timer, IIC and SCI(8位微控制器(8M))
中文描述: 8 - 16K的光碟/雙層/存儲器,512字節(jié)RAM,ADC和DAC的器(PWM),定時器,IIC和脊髓損傷(8位微控制器(8米)位MCU)
文件頁數(shù): 67/94頁
文件大?。?/td> 642K
代理商: ST72371
67/94
ST72371/ST72372
4.6 PWM/BRM GENERATOR (DAC)
4.6.1 Introduction
This PWM/BRM peripheral includes two types of
PWM/BRM outputs, with differing step resolutions
based on the Pulse Width Modulator (PWM) and
Binary Rate Multiplier (BRM) Generator technique
are available. It allows the digital to analog conver-
sion (DAC) when used with external filtering.
4.6.2 Main Features
I
Fixed frequency: f
CPU
/64
I
Resolution: T
CPU
I
10-Bit PWM/BRM generator with a step of
V
DD
/2
10
(5mV if V
DD
=5V)
I
12-bit PWM/BRM generator with step of
V
DD
/2
12
(1.25mV if V
DD
=5V).
4.6.3 Functional Description
4.6.3.1 10-bit PWM/BRM
The 10 bits of the 10-bit PWM/BRM are distributed
as 6 PWM bits and 4 BRM bits. The generator con-
sists of a 12-bit counter (common for all channels),
a comparator and the PWM/BRM generation logic.
PWM Generation
The counter increments continuously, clocked at
internal CPU clock. Whenever the 6 least signifi-
cant bits of the counter (defined as the PWM coun-
ter) overflow, the output level for all active chan-
nels is set.
The state of the PWM counter is continuously
compared to the PWM binary weight for each
channel, as defined in the relevant PWM register,
and when a match occurs the output level for that
channel is reset.
This Pulse Width modulated signal must be fil-
tered, using an external RC network placed as
close as possible to the associated pin. This pro-
vides an analog voltage proportional to the aver-
age charge passed to the external capacitor. Thus
for a higher mark/space ratio (High time much
greater than Low time) the average output voltage
is higher. The external components of the RC net-
work should be selected for the filtering level re-
quired for control of the system variable.
Each output may individually have its polarity in-
verted by software, and can also be used as a log-
ical output.
Figure 27. PWM Generation
COUNTER
63
COMPARE
VALUE
OVERFLOW
OVERFLOW
OVERFLOW
000
t
PWM OUTPUT
t
T
CPU
x 64
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