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參數(shù)資料
| 型號： | ST72371 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8-Bit MCUs with 16K ROM/OTP/EPROM, 512 Bytes RAM, ADC, DAC (PWM), Timer, IIC and SCI(8位微控制器(8M)) |
| 中文描述： | 8 - 16K的光碟/雙層/存儲器，512字節(jié)RAM，ADC和DAC的器（PWM），定時器，IIC和脊髓損傷（8位微控制器（8米）位MCU） |
| 文件頁數(shù)： | 14/94頁 |
| 文件大?。?/td> | 642K |
| 代理商： | ST72371 |
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14/94
ST72371/ST72372
CENTRAL PROCESSING UNIT
(Cont’d)
Stack Pointer (SP)
Read/Write
Reset Value: 01 FFh
The Stack Pointer is a 16-bit register which is al-
ways pointing to the next free location in the stack.
It is then decremented after data has been pushed
onto the stack and incremented before data is
popped from the stack (seeFigure 7).
Since the stack is 256 bytes deep, the most signif-
icant byte is forced by hardware. Following an
MCU Reset, or after a Reset Stack Pointer instruc-
tion (RSP), the Stack Pointer contains its reset val-
ue (the SP7 to SP0 bits are set) which is the stack
higher address.
The least significant byte of the Stack Pointer can
be directly accessed by a LD instruction.
Note:
When the lower limit is exceeded, the Stack
Pointer wraps around to the stack upper limit, with-
out indicating the stack overflow. The previously
stored information is then overwritten and there-
fore lost. The stack also wraps in case of an under-
flow.
The stack is used to save the return address dur-
ing a subroutine call and the CPU context during
an interrupt. The user may also directly manipulate
the stack by means of the PUSH and POP instruc-
tions. In the case of an interrupt, the PCL is stored
at the first location pointed to by the SP. Then the
other registers are stored in the next locations as
shown in Figure 7.
– When an interrupt is received, the SP is decre-
mented and the context is pushed on the stack.
– On return from interrupt, the SP is incremented
and the context is popped from the stack.
A subroutine call occupies two locations and an in-
terrupt five locations in the stack area.
Figure 7.Stack Manipulation Example
15
8
0
0
0
0
0
0
0
1
7
0
SP7
SP6
SP5
SP4
SP3
SP2
SP1
SP0
PCH
PCL
SP
PCH
PCL
SP
PCL
PCH
X
A
CC
PCH
PCL
SP
PCL
PCH
X
A
CC
PCH
PCL
SP
PCL
PCH
X
A
CC
PCH
PCL
SP
SP
Y
CALL
Subroutine
Interrupt
event
PUSH Y
POP Y
IRET
RET
or RSP
@ 01FFh
@ 0100h
Stack Higher Address = 01FFh
Stack Lower Address = 0100h
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST72371N4B1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCUs WITH 16K ROM/OTP/EPROM,512 BYTES RAM, ADC, DAC (PWM), TIMER, I2C AND SCI |
| ST72371N4B1/XXX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROCONTROLLER|8-BIT|ST72 CPU|CMOS|SDIP|56PIN|PLASTIC |
| ST72371N4T1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCUs WITH 16K ROM/OTP/EPROM,512 BYTES RAM, ADC, DAC (PWM), TIMER, I2C AND SCI |
| ST72372 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCUs WITH 16K ROM/OTP/EPROM,512 BYTES RAM, ADC, DAC (PWM), TIMER, I2C AND SCI |
| ST72372J4B1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCUs WITH 16K ROM/OTP/EPROM,512 BYTES RAM, ADC, DAC (PWM), TIMER, I2C AND SCI |
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