參數(shù)資料
型號： ST72371
廠商： 意法半導體
英文描述： 8-Bit MCUs with 16K ROM/OTP/EPROM, 512 Bytes RAM, ADC, DAC (PWM), Timer, IIC and SCI(8位微控制器(8M))
中文描述： 8 - 16K的光碟/雙層/存儲器，512字節(jié)RAM，ADC和DAC的器（PWM），定時器，IIC和脊髓損傷（8位微控制器（8米）位MCU）
文件頁數(shù)： 20/94頁
文件大?。?/td> 642K
代理商： ST72371
20/94
ST72371/ST72372
INTERRUPTS
(Cont’d)
Table 7. Interrupt Mapping
* Many flags can cause an interrupt: see peripheral interrupt status register description.
Source
Block
Description
Register
Label
Flag
Exit
from
HALT
yes
no
Vector
Address
Priority
Order
RESET
TRAP
Reset
Software Interrupt
N/A
N/A
N/A
N/A
FFFEh-FFFFh
FFFCh-FFFDh
FFFAh-FFFBh
FFF8h-FFF9h
FFF6h-FFF7h
FFF4h-FFF5h
FFF2h-FFF3h
FFF0h-FFF1h
FFEEh-FFEFh
FFECh-FFEDh
NOT USED
NOT USED
EI3
EI2
EI1
EI0
EI4
Ext. Interrupt PD7, rising edge
Ext. Interrupt PD3, falling edge
Ext. Interrupt PD4, falling edge
Ext. Interrupt PD5, falling edge
Ext. Interrupt PC2, falling edge
ITRFRE
ITRFRE
ITRFRE
ITRFRE
MISCR
EI3F
EI2F
EI1F
EI0F
EI4F
yes
NOT USED
TIMER
Input Capture 1
Input Capture 2
Output Compare 1
Output Compare 2
Timer Overflow
TIMSR
ICF1
ICF2
OCF1
OCF2
TOF
no
FFEAh-FFEBh
FFE8h-FFE9h
FFE6h-FFE7h
I2C
I2C Interface Interrupt
I2CSR1
I2CSR2
*
FFE4h-FFE5h
SCI
Transmit Buffer Empty
Transmit Complete
Receive Buffer Full
Idle Line Detect
Overrun
SCISR
TDRE
TC
RDRF
IDLE
OR
FFE2h-FFE3h
NOT USED
FFE0h-FFE1h
Highest
Priority
Priority
Lowest
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