參數(shù)資料
型號: ST72371
廠商: 意法半導(dǎo)體
英文描述: 8-Bit MCUs with 16K ROM/OTP/EPROM, 512 Bytes RAM, ADC, DAC (PWM), Timer, IIC and SCI(8位微控制器(8M))
中文描述: 8 - 16K的光碟/雙層/存儲器,512字節(jié)RAM,ADC和DAC的器(PWM),定時器,IIC和脊髓損傷(8位微控制器(8米)位MCU)
文件頁數(shù): 69/94頁
文件大?。?/td> 642K
代理商: ST72371
69/94
ST72371/ST72372
PWM/BRM GENERATOR
(Cont’d)
BRM Generation
The BRM bits allow the addition of a pulse to wid-
en a standard PWM pulse for specific PWM cy-
cles. This has the effect of “fine-tuning” the PWM
Duty cycle (without modifying the base dutycycle),
thus, with the external filtering, providing additional
fine voltage steps.
The incremental pulses (with duration of T
CPU
) are
added to the beginning of the original PWM pulse.
The PWM intervals which are added to are speci-
fied in the 4-bit BRM register and are encoded as
shown in the following table. The BRM values
shown may be combined together to provide a
summation of the incremental pulse intervals
specified.
The pulse increment corresponds to the PWM res-
olution.
For example,if
– Data 18h is written to the PWM register
– Data 06h (00000110b) is written to the BRM reg-
ister
– with a 8MHz internal clock (125ns resolution)
Then 3.0
μ
s-long pulse will be output at 8
μ
s inter-
vals, except for cycles numbered 2,4,6,10,12,14,
where the pulse is broadened to 3.125
μ
s.
Note.
If 00h is written to both PWM and BRM reg-
isters, the generator output will remain at “0”. Con-
versely, if both registers hold data 3Fh and 0Fh,
respectively, the output will remain at “1” for all in-
tervals #1 to #15, but it will return to zero at interval
#0 for an amount of time corresponding to the
PWM resolution (T
CPU
).
An output can be set to a continuous “1” level by
clearing the PWM and BRM values and setting
POL = “1” (inverted polarity) in the PWM register.
This allows a PWM/BRM channel to be used as an
additional I/O pin if the DAC function is not re-
quired.
Table 19. Bit BRM Added Pulse Intervals
(Interval #0 not selected).
Figure 30. BRM pulse addition (PWM > 0)
BRM 4 - Bit Data
0000
0001
0010
0100
1000
Incremental Pulse Intervals
none
i = 8
i = 4,12
i = 2,6,10,14
i = 1,3,5,7,9,11,13,15
T
CPU
x 64
T
CPU
x 64
T
CPU
x 64
T
CPU
increment
m=1
m=0
m=2
T
CPU
x 64
m=15
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