參數(shù)資料
型號： SM320F2812HFGM
廠商： TEXAS INSTRUMENTS INC
元件分類： 數(shù)字信號處理
英文描述： 16-BIT, 150 MHz, OTHER DSP, CQFP172
封裝： NCTB, CERAMIC, QFP-172
文件頁數(shù)： 20/147頁
文件大?。?/td> 1721K
代理商： SM320F2812HFGM
Electrical Specifications
116
December 2004
SGUS053
For the case where XCLKOUT = one-half XTIMCLK, the XCLKOUT edge with which the change will be aligned
can be determined based on the number of XTIMCLK cycles from the start of the access to the point at which
the signal changes. If this number of XTIMCLK cycles is even, the alignment will be with respect to the rising
edge of XCLKOUT. If this number is odd, then the signal will change with respect to the falling edge of
XCLKOUT. Examples include the following:
Strobes that change at the beginning of an access always align to the rising edge of XCLKOUT. This is
because all XINTF accesses begin with respect to the rising edge of XCLKOUT.
Examples:
XZCSL
Zone chip-select active low
XRNWL
XR/W active low
Strobes that change at the beginning of the active period will align to the rising edge of XCLKOUT if the
total number of lead XTIMCLK cycles for the access is even. If the number of lead XTIMCLK cycles is odd,
then the alignment will be with respect to the falling edge of XCLKOUT.
Examples:
XRDL
XRD active low
XWEL
XWE active low
Strobes that change at the beginning of the trail period will align to the rising edge of XCLKOUT if the total
number of lead + active XTIMCLK cycles (including hardware waitstates) for the access is even. If the
number of lead + active XTIMCLK cycles (including hardware waitstates) is odd, then the alignment will
be with respect to the falling edge of XCLKOUT.
Examples:
XRDH
XRD inactive high
XWEH
XWE inactive high
Strobes that change at the end of the access will align to the rising edge of XCLKOUT if the total number
of lead + active + trail XTIMCLK cycles (including hardware waitstates) is even. If the number of lead +
active + trail XTIMCLK cycles (including hardware waitstates) is odd, then the alignment will be with
respect to the falling edge of XCLKOUT.
Examples:
XZCSH
Zone chip-select inactive high
XRNWH
XR/W inactive high
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參數(shù)描述
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SM320F2812HFGS150 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC HT Dig Signal Controller RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
SM320F2812-HT 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Signal Processor
SM320F2812KGDS150A 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC HT Dig Signal Controller RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
SM320F2812PGFMEP 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC EP Digital Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
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