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參數(shù)資料
| 型號(hào)： | SM320F2812HFGM |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | 16-BIT, 150 MHz, OTHER DSP, CQFP172 |
| 封裝： | NCTB, CERAMIC, QFP-172 |
| 文件頁(yè)數(shù)： | 134/147頁(yè) |
| 文件大小： | 1721K |
| 代理商： | SM320F2812HFGM |
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Electrical Specifications
87
December 2004
SGUS053
6.6
Reducing Current Consumption
28x DSPs incorporate a unique method to reduce the device current consumption. A reduction in current
consumption can be achieved by turning off the clock to any peripheral module which is not used in a given
application. Table 61 indicates the typical reduction in current consumption achieved by turning off the clocks
to various peripherals.
Table 61. Typical Current Consumption by Various Peripherals (at 150 MHz)
PERIPHERAL MODULE
IDD CURRENT REDUCTION (mA)
eCAN
12
EVA
6
EVB
6
ADC
8
SCI
4
SPI
5
McBSP
13
All peripheral clocks are disabled upon reset. Writing to/reading from peripheral registers is possible only after the peripheral clocks
are turned on.
This number represents the current drawn by the digital portion of the ADC module. Turning off the clock to the ADC module results in the
elimination of the current drawn by the analog portion of the ADC (ICCA) as well.
6.7
Power Sequencing Requirements
SM320F2812 silicon requires dual voltages (1.8-V or 1.9-V and 3.3-V) to power up the CPU, Flash, ROM,
ADC, and the I/Os. To ensure the correct reset state for all modules during power up, there are some
requirements to be met while powering up/powering down the device. The current F2812 silicon reference
schematics (Spectrum Digital Incorporated eZdsp. board) suggests two options for the power sequencing
circuit.
Option 1:
In this approach, an external power sequencing circuit enables VDDIO first, then VDD and VDD1 (1.8 V or
1.9 V). After 1.8 V (or 1.9 V) ramps, the 3.3 V for Flash (VDD3VFL) and ADC (VDDA1/VDDA2/AVDDREFBG)
modules are ramped up. While option 1 is still valid, TI has simplified the requirement. Option 2 is the
recommended approach.
Option 2:
Enable power to all 3.3-V supply pins (VDDIO, VDD3VFL, VDDA1/VDDA2/VDDAIO/AVDDREFBG) and then
ramp 1.8 V (or 1.9 V) (VDD/VDD1) supply pins.
1.8 V or 1.9 V (VDD/VDD1) should not reach 0.3 V until VDDIO has reached 2.5 V. This ensures the reset
signal from the I/O pin has propagated through the I/O buffer to provide power-on reset to all the modules
inside the device. See Figure 68 for power-on reset timing.
Power-Down Sequencing:
During power-down, the device reset should be asserted low (8
s, minimum) before the VDD supply
reaches 1.5 V. This will help to keep on-chip flash logic in reset prior to the VDDIO/VDD power supplies
ramping down. It is recommended that the device reset control from “Low-Dropout (LDO)” regulators or
voltage supervisors be used to meet this constraint. LDO regulators that facilitate power-sequencing (with
the aid of additional external components) may be used to meet the power sequencing requirement. See
www.spectrumdigital.com for F2812 eZdsp
schematics and updates.
Table 62. Recommended “Low-Dropout Regulators”
SUPPLIER
PART NUMBER
Texas Instruments
TPS767D301
eZdsp is a trademark of Spectrum Digital Incorporated.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SM320F2812HFGM150 | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC Military DSP RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| SM320F2812HFGS150 | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC HT Dig Signal Controller RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| SM320F2812-HT | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Signal Processor |
| SM320F2812KGDS150A | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC HT Dig Signal Controller RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| SM320F2812PGFMEP | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC EP Digital Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
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