參數(shù)資料
型號： SM320F2812HFGM
廠商： TEXAS INSTRUMENTS INC
元件分類： 數(shù)字信號處理
英文描述： 16-BIT, 150 MHz, OTHER DSP, CQFP172
封裝： NCTB, CERAMIC, QFP-172
文件頁數(shù)： 147/147頁
文件大?。?/td> 1721K
代理商： SM320F2812HFGM
Electrical Specifications
99
December 2004
SGUS053
Table 611. STANDBY Mode Switching Characteristics
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
td(IDLE-XCOH)
Delay time, IDLE instruction
executed to XCLKOUT high
32 * tc(SCO)
12 * tc(CI)
Cycles
tw(WAKE-INT)
Pulse duration, external
Without input qualifier
12 * tc(CI)
Cycles
tw(WAKE-INT)
Pulse duration, external
wake-up signal
With input qualifier
(2 + QUALSTDBY) * tc(CI)
Cycles
Delay time, external wake
signal to program execution
resume
Wake-up from Flash
Flash module in active state
Without input qualifier
12 * tc(CI)
Cycles
td(WAKE-STBY)
Wake-up from Flash
Flash module in active state
With input qualifier
12 * tc(CI) + tw(WAKE-INT)
Cycles
td(WAKE-STBY)
Wake-up from Flash
Flash module in sleep state
Without input qualifier
1125 * tc(SCO)
Cycles
Wake-up from Flash
Flash module in sleep state
With input qualifier
1125 * tc(SCO) +
tw(WAKE-INT)
Cycles
Wake-up from SARAM
Without input qualifier
12 * tc(CI)
Cycles
Wake-up from SARAM
With input qualifier
12 * tc(CI) + tw(WAKE-INT)
Cycles
QUALSTDBY is a 6-bit field in the LPMCR0 register.
This is the time taken to begin execution of the instruction that immediately follows the IDLE instruction. Execution of an ISR (triggered by the
wake-up) signal involves additional latency.
tw(WAKE-INT)
td(WAKE-STBY)
td(IDLEXCOH)
32 SYSCLKOUT Cycles
Wakeup
Signal
X1/XCLKIN
XCLKOUT
STANDBY
Normal Execution
STANDBY
Flushing Pipeline
A
B
C
D
E
F
Device
Status
NOTES: A. IDLE instruction is executed to put the device into STANDBY mode.
B. The PLL block responds to the STANDBY signal. SYSCLKOUT is held for approximately 32 cycles before being turned
off. This 32cycle delay enables the CPU pipe and any other pending operations to flush properly.
C. The device is now in STANDBY mode.
D. The external wakeup signal is driven active (negative edge triggered shown as an example).
E. After a latency period, the STANDBY mode is exited.
F. Normal operation resumes. The device will respond to the interrupt (if enabled).
Figure 613. STANDBY Entry and Exit Timing
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