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參數(shù)資料
| 型號(hào)： | SAA7392 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Channel encoder/decoder CDR60(通道編碼器/譯碼器) |
| 中文描述： | 信道編碼器/解碼器CDR60（通道編碼器/譯碼器） |
| 文件頁(yè)數(shù)： | 52/76頁(yè) |
| 文件大?。?/td> | 246K |
| 代理商： | SAA7392 |
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2000 Mar 21
52
Philips Semiconductors
Preliminary specification
Channel encoder/decoder CDR60
SAA7392
7.15
The EFM modulator
This block takes data from the data encoder block and adds the subcode and synchronisation information. This data
stream is modulated using EFM according to the Red Book standard. This data is output serially from the SAA7392, with
the associated EFM clock signal.
7.15.1
EFM P
RESET
C
OUNT
R
EGISTER
(EFMP
RESET
C
OUNT
)
Table 112
EFM Preset Count Register (address 3CH) - WRITE
Table 113
Description of EFMPresetCount bits
7.15.2
EFM M
ODULATOR
C
ONFIGURATION
R
EGISTER
(EFMM
OD
C
ONFIG
)
Table 114
EFM Modulator Configuration Register (address 3DH) - WRITE
Table 115
Description of EFMModConfig bits
7
6
5
4
3
2
1
0
Count.5
Count.4
Count.3
Count.2
Count.1
Count.0
BIT
SYMBOL
Count<5:0>
DESCRIPTION
7 and 6
5 to 0
These 2 bits are reserved.
This field can be used to program a position in an EFM frame for the modulator to start
outputting data.
7
6
5
4
3
2
1
0
EFMClkSel
ModifiedEFM EnableLWRT
LWRTOn
GateClkOn
DataSel.1
DataSel.0
PanicOn
BIT
SYMBOL
DESCRIPTION
7
EFMClkSel
If EFMClkSel = 0, then EFM clock generator outputs normal XEFM frequency clock. If
EFMClkSel = 1, then EFM clock generator outputs double frequency XEFM clock.
ModifiedEFM If ModifiedEFM = 0, then normal EFM output. If ModifiedEFM = 1, then all ‘0’ output
symbols are increased in length by one bit.
EnableLWRT If EnableLWRT = 0, then LaserOn is off. If EnableLWRT = 1, then LaserOn will be set
when WriteOn1 is turned on.
LWRTOn
If LWRTOn = 0, then LaserOn determined by EnableLWRT bit. If LWRTOn = 1, then
LaserOn output is enabled unconditionally.
GateClkOn
If GateClkOn = 0, then XEFM clock is on if WriteOn2 is set. If GateClkOn = 1, then
XEFM clock is gated on unconditionally.
DataSel.1
These 2 bits along with the DataSel.2 bit in register EFMCON2 select the output data
format; see Table 119.
DataSel.0
PanicOn
If PanicOn = 1, the Panic input is enabled. LaserOn will be disabled immediately when
the PANIC pin (pin 27) is logic 1.
6
5
4
3
2
1
0
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