參數(shù)資料
型號(hào): SAA7392
廠商: NXP Semiconductors N.V.
英文描述: Channel encoder/decoder CDR60(通道編碼器/譯碼器)
中文描述: 信道編碼器/解碼器CDR60(通道編碼器/譯碼器)
文件頁(yè)數(shù): 50/76頁(yè)
文件大小: 246K
代理商: SAA7392
2000 Mar 21
50
Philips Semiconductors
Preliminary specification
Channel encoder/decoder CDR60
SAA7392
7.12.6
G
ENERATING
CD-T
EXT
CD-Text is stored in the R to W channels of the disc. The
CD-Text standard states that a CD-Text disc must at least
contain CD-Text information in the lead-in, and it may
contain CD-Text information in the program area.
CDR60 supports writing of the R to W subcode channels
only in bypass mode which means that the whole subcode
information has to be generated from an external device. It
is not possible to use the automatic subcode formatting
features like auto-incrementing or the two buffers which
means that the application has to take care of the whole
subcode formatting itself. However, if an application likes
to write a CD-Text disc that contains CD-Text information
only in the lead-in area, then the application can use the
auto-format features for writing the program area and only
use the bypass mode to write CD-Text information when
writing the lead-in.
7.13
The data encoder block
Thisblock generates allC1/C2 errorcorrectiondataforthe
raw data.
7.14
Encode control block
This block controls the starting and stopping of the writing
process. It does this based on the QSync signal it receives
from the subcode insert block and the ATIPSync and
W441discpositioninformationitreceivesfromtheWobble
processor.
7.14.1
E
NCODE
W
RITE
O
N
C
ONTROL
R
EGISTER
(E
NCODE
WC
ON
)
Table 104
Encode WriteOn Control Register (address 30H) - READ/WRITE
Table 105
Description of EncodeWContr bits
7
6
5
4
3
2
1
0
WriteOn1
WriteOn2
EFMDelOn
Count.4
Count.3
Count.2
Count.1
Count.0
BIT
SYMBOL
DESCRIPTION
7
WriteOn1
If WriteOn1 = 0, then laser is off or turn laser off. If WriteOn1 = 1, then laser is on or turn
laser on.
If WriteOn2 = 0, then data flow is off or turn data flow off. If WriteOn2 = 1, then data flow
is on or turn data flow on.
If EFMDelOn = 0, then disable delay of WriteOn1. If EFMDelOn = 1, then enable delay
of WriteOn1 with EncodeStartOffset/EncodeStopOffset of W441 pulses relative to
ATIPSync.
These 5 bits determine the delay generation of internal WriteOn flags by Count<4:0>
ATIPSyncs.
6
WriteOn2
5
EFMDelOn
4
3
2
1
0
Count.4
Count.3
Count.2
Count.1
Count.0
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