參數(shù)資料
型號(hào)： SAA6712E
廠商： NXP SEMICONDUCTORS
元件分類： 數(shù)學(xué)處理器
英文描述： ECONOLINE: RB & RA - Dual Output from a Single Input Rail- Power Sharing on Output- Industry Standard Pinout- 1kVDC & 2kVDC Isolation- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 85%
中文描述： GRAPHICS PROCESSOR, PBGA292
封裝： 27 X 27 MM, 1.75 MM HEIGHT, PLASTIC, SOT-489-1, BGA-292
文件頁數(shù)： 48/64頁
文件大?。?/td> 228K
代理商： SAA6712E
1999 Aug 25
48
Philips Semiconductors
Preliminary specification
XGA RGB to TFT graphics engine
SAA6712E
8.8
Overlay port
8.8.1
O
VERLAY INSERTION
If ovl_syncs_active is HIGH, the vertical and horizontal
syncsignalsfortheexternalOSDcontrolleraregenerated.
The flag ovl_insert_active switches on the insertion of the
information at the overlay port provided by an external
OSD controller into the data stream at the position defined
by ovl_v_offset, ovl_hs_start, and ovl_hs_latency
(see Fig.13).
The incoming data from ports ovl0 and ovl1 is replaced by
the defined colour information and treated as a double
pixel, which will be inserted into the data stream if OVACT
is set. The pixel at port 0 is then the left pixel, and the pixel
at port 1 is the right pixel. The sampling of the ports ovl0
and ovl1 is done on the positive edge of OVCLK in the
event that sample_edge is asserted, otherwise on the
falling edge of OVCLK.
Fig.13 Overlay window positioning.
handbook, full pagewidth
MHB258
OUTPUT FRAME
OVERLAY
WINDOW
ovl_v_offset
ovl_hs_start
ovl_hs_latency
ovl_h_length
ovl_v_length
ovl_vs_start
one line Vsync
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAA6713AH 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:XGA analog input flat panel controller
SAA6713AH/V1 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:XGA analog input flat panel controller
SAA6713H 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:XGA dual input flat panel controller
SAA6713H/V1 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:XGA dual input flat panel controller
SAA6721 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:SXGA RGB to TFT graphics engine
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