參數(shù)資料
型號: SAA6712E
廠商: NXP SEMICONDUCTORS
元件分類: 數(shù)學(xué)處理器
英文描述: ECONOLINE: RB & RA - Dual Output from a Single Input Rail- Power Sharing on Output- Industry Standard Pinout- 1kVDC & 2kVDC Isolation- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 85%
中文描述: GRAPHICS PROCESSOR, PBGA292
封裝: 27 X 27 MM, 1.75 MM HEIGHT, PLASTIC, SOT-489-1, BGA-292
文件頁數(shù): 19/64頁
文件大?。?/td> 228K
代理商: SAA6712E
1999 Aug 25
19
Philips Semiconductors
Preliminary specification
XGA RGB to TFT graphics engine
SAA6712E
8
SYSTEM DESCRIPTION
8.1
Programming registers
The SAA6712E is a highly integrated device with many
features. To get the desired functionality and performance
it must be programmed correctly. In general, before
programming, the device must be switched to the internal
reset state to prevent unwanted functions while changing
the registers.
After writing to all registers the internal reset can be
released. There are some registers (mainly offset
counters) that can be changed during data processing
without an internal reset. All accesses to the on screen
display can be done during data processing.
Table 4
I
2
C-bus device address
When bit SAD = 0 the address is 74H; when bit SAD = 1
the address is 76H.
Table 5 shows the programming model.
MSB
LSB
0
1
1
1
0
1
SAD
R/W
Table 5
Programming register overview
ADDRESS R/W
D7
D6
D5
D4
D3
D2
D1
D0
State
0
1
2
3
R
R
reserved
reserved
R/W iic_test_register[7 to 0]
R
intr
RGB mode detection
4
R
pos_
vsync
pos_
hsync
no_
vsync
no_
hsync
5
6
7
8
R
R
R
R
v_lines[7 to 0]
v_lines[10 to 8]
h_clocks[7 to 0]
h_clocks[11 to 8]
RGB auto-adjustment
9
10
11
12
13
14
15
16
17
18
19
W
W
W
W
W
R
R
R
R
R
R
ref_line[7 to 0]
ref_line[10 to 8]
ref_pixel[7 to 0]
ref_pixel[11 to 8]
ref_colour[7 to 0]
ref_pixel_red[7 to 0]
ref_pixel_green[7 to 0]
ref_pixel_blue[7 to 0]
black_lines[7 to 0]
black_pixels[7 to 0]
black_
pixels[8]
20
21
R
R
non_black_lines[7 to 0]
non_black_lines[10 to 8]
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