參數(shù)資料
型號： S568013MFA00E
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數(shù)字信號處理
英文描述： 0-BIT, 8 MHz, OTHER DSP, PQFP32
封裝： ROHS COMPLIANT, LQFP-32
文件頁數(shù)： 76/125頁
文件大?。?/td> 1702K
代理商： S568013MFA00E
56F8013/56F8011 Data Sheet, Rev. 11
54
Freescale Semiconductor
5.5.3.4
SCI Transmitter Idle Interrupt Priority Level (SCI_TIDL IPL)—
Bits 9–8
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.5.3.5
SCI Transmitter Empty Interrupt Priority Level (SCI_XMIT IPL)—
Bits 7–6
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.5.3.6
SPI Transmitter Empty Interrupt Priority Level (SPI_XMIT IPL)—
Bits 5–4
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.5.3.7
SPI Receiver Full Interrupt Priority Level (SPI_RCV IPL)—
Bits 3–2
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
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