參數(shù)資料
型號(hào)： S568013MFA00E
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數(shù)字信號(hào)處理
英文描述： 0-BIT, 8 MHz, OTHER DSP, PQFP32
封裝： ROHS COMPLIANT, LQFP-32
文件頁數(shù)： 74/125頁
文件大?。?/td> 1702K
代理商： S568013MFA00E
56F8013/56F8011 Data Sheet, Rev. 11
52
Freescale Semiconductor
5.5.2.3
GPIOD Interrupt Priority Level (GPIOD IPL)—Bits 11–10
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.5.2.4
Reserved—Bits 9–8
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.5.2.5
FM Command, Data, Address Buffers Empty Interrupt Priority Level
(FM_CBE IPL)—Bits 7–6
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.5.2.6
FM Command Complete Priority Level (FM_CC IPL)—Bits 5–4
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.5.2.7
FM Error Interrupt Priority Level (FM_ERR IPL)—Bits 3–2
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
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