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參數(shù)資料
| 型號(hào)： | S568013MFA00E |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | 0-BIT, 8 MHz, OTHER DSP, PQFP32 |
| 封裝： | ROHS COMPLIANT, LQFP-32 |
| 文件頁數(shù)： | 28/125頁 |
| 文件大?。?/td> | 1702K |
| 代理商： | S568013MFA00E |
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Electrical Design Considerations
56F8013/56F8011 Data Sheet, Rev. 11
Freescale Semiconductor
123
Bypass the VDD and VSS with approximately 100μF, plus the number of 0.1μF ceramic capacitors
PCB trace lengths should be minimal for high-frequency signals
Consider all device loads as well as parasitic capacitance due to PCB traces when calculating capacitance.
This is especially critical in systems with higher capacitive loads that could create higher transient currents
in the VDD and VSS circuits.
Take special care to minimize noise levels on the VREF, VDDA and VSSA pins
Using separate power planes for VDD and VDDA and separate ground planes for VSS and VSSA is
recommended. Connect the separate analog and digital power and ground planes as close as possible to
power supply outputs. If both analog circuit and digital circuit are powered by the same power supply, it is
advisable to connect a small inductor or ferrite bead in serial with both VDDA and VSSA traces.
It is highly desirable to physically separate analog components from noisy digital components by ground
planes. Do not place an analog trace in parallel with digital traces. It is also desirable to place an analog
ground trace around an analog signal trace to isolate it from digital traces.
Because the Flash memory is programmed through the JTAG/EOnCE port, SPI, SCI or I2C, the designer
should provide an interface to this port if in-circuit Flash programming is desired.
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