
S3FB42F MICROCONTROLLER
xiii
List of Figures
Figure
Title
Page
Number
1-1
Top Block Diagram ..............................................................................................1-3
1-2
CalmRISC Pipeline Diagram .................................................................................1-4
1-3
CalmRISC Pipeline Stream Diagram......................................................................1-5
1-4
Block Diagram ....................................................................................................1-6
1-5
100-QFP Pin Assignment.....................................................................................1-7
1-6
100-TQFP Pin Assignment ...................................................................................1-8
1-7
Pin Circuit Type 1 (Port 0, P1.0-P1.4, P6.0-P6.5, and Port 7) ..................................1-13
1-8
Pin Circuit Type 2 (P6.6 and P6.7) ........................................................................1-13
1-9
Pin Circuit Type 3 (P4.2) ......................................................................................1-14
1-10
Pin Circuit Type 4 (Port 2, Port 8, and Port 9) ........................................................1-15
1-11
Pin Circuit Type 5 (Port 3) ....................................................................................1-15
1-12
Pin Circuit Type 6 (P4.0, and P4.1) .......................................................................1-16
1-13
Pin Circuit Type 7 (Port 5) ....................................................................................1-16
1-14
Pin Circuit Type 8 (RESET) ..................................................................................1-17
1-15
Pin Circuit Type 9 (TEST) .....................................................................................1-17
2-1
Flash Memory (Code Memory Area)......................................................................2-2
2-2
Data Memory Map...............................................................................................2-3
2-3
Data Memory Map in CalmRISC Side....................................................................2-4
2-4
Data Memory Map in MAC-2424 Side....................................................................2-5
2-5
Data Memory Map...............................................................................................2-6
3-1
Bank Selection by Setting of GRB Bits and IDB Bit ................................................3-3
4-1
Memory Map Area...............................................................................................4-1
5-1
Hardware Stack...................................................................................................5-1
5-2
Even and Odd Bank Selection Example.................................................................5-2
5-3
Stack Operation with PC [19:0].............................................................................5-3
5-4
Stack Operation with Registers.............................................................................5-4
5-5
Stack Overflow ....................................................................................................5-5
6-1
Interrupt Structure................................................................................................6-3
6-2
Interrupt Structure................................................................................................6-4
6-3
Interrupt Mask Register........................................................................................6-5
6-4
Interrupt Priority Register......................................................................................6-6