
S3FB42F
PARALLEL PORT INTERFACE
19-5
Digital Filtering
The S3FB42F provides digital filtering function on host control signal inputs, nSELECTIN (P1284), nSTROBE
(HostCLK), nAUTOFD (H0TACK) and nINIT (nReverseRequest), to improve noise immunity and make the PPIC more
impervious to the inductive switching noise. The digital filtering function can be enabled regardless of hardware
handshaking or software handshaking.
If this function is enabled, the host control signal can be detected only when its input level keeps stable during three
sampling periods.
Digital filtering can be disabled to avoid signal missing in some specialized applications with high bandwidth
requirement. Otherwise, it is recommended that digital filtering be enabled.
PPIC SPECIAL REGISTERS
PARALLEL PORT DATA/COMMAND DATA REGISTER
The parallel port data/command data register, PPDATA/PPCDATA, contains an 8-bit data field,
PPDATA/PPCDATA[7:0], that defines the logic level on the parallel port data pins, PPD[7:0].
Register
Address
R/W
Description
Reset Value
PPDATA
0x60
R/W
Parallel port data register
00h
PPCDATA
0x61
R/W
Parallel port command data register
00h
[7:0]
This is an 8-bit read/write field. When PPCONL[7] is zero and this field (PPDATA or PPCDATA) is
read, this field provides the logic level on the PPD[7:0], which is latched when the strobe input from
the host (nSTROBE) transits from high to low level. (The PPCONL[7] bit determines the forward or
reverse dataflow direction of the parallel port.) When PPCONL[7] is one and this field(PPDATA or
PPCDATA) is written, the value of this field determines the logic level on the PPD[7:0].
During the ECP forward data transfers, the logic level of the nAUTOFD is read from PPINTPNDH[1]
or [0], command-byte received or data-byte received. The nAUTOFD indicates whether the data in
the PPDATA/PPCDATA is a data-byte or a command-byte.
When read PPDATA or PPCDATA,
command-byte: PPINTPND[1:0] = '10b'
data-byte: PPINTPND[1:0] = '01b'
To read the nAUTOFD from the PPINTPNDH[1] or [0] the following two conditions are required:
1) nSTROBE has transited from high level to low level.
2) The data bus output enable bit in the PPCONL[7] is 0.
When the ECP data transfers are in reverse and the data bus output enable bit in the parallel port
control register, PPCONL[7] is 1, the logic level of BUSY pin is written from PPDATA or PPCDATA.
The BUSY pin indicates that the data written in the PPDATA is a data-byte, or the data written in the
PPCDATA is a command-byte.
BUSY pin
0 = Command-byte in the PPCDATA[7:0]
1 = Data-byte in the PPDATA[7:0]