- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98068 > S1C62920D 4-BIT, MROM, 1.3 MHz, MICROCONTROLLER, UUC63 PDF資料下載
參數(shù)資料
| 型號： | S1C62920D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 1.3 MHz, MICROCONTROLLER, UUC63 |
| 封裝： | DIE-63 |
| 文件頁數(shù)： | 66/78頁 |
| 文件大?。?/td> | 874K |
| 代理商： | S1C62920D |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁當(dāng)前第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁
S1C62920 TECHNICAL MANUAL
EPSON
61
CHAPTER 5: SUMMARY OF NOTES
I/O ports
When input terminals are changed from low to high by pull up resistor, the rise of the waveform is delayed
on account of the time constant of the pull up resistor and input gate capacitance. Hence, when fetching
data during input mode, set an appropriate wait time.
Particular care needs to be taken of the key scan during key matrix configuration.
Make this waiting time the amount of time or more calculated by the following expression.
Waiting time = RIN
× (CIN + load capacitance on board) × 1.6 [sec]
RIN: pull up resistance (Max. value)
CIN: terminal capacitance (Max. value)
LCD driver
(1) The contents of the display memory are undefined until the area is initialized (through, for instance,
memory clear processing by the CPU). Initialize the display memory by executing initial processing.
(2) Since the display memory area is write-only, display data cannot be rewritten by arithmetic operations
(such as AND, OR, ADD, SUB).
(3) 100 msec or more time is necessary for stabilizing the LCD drive voltages VC1 and VC3 after setting the
LCD power control register LPWR to "1". Be careful of the segment-on right after the power is turned
on.
Clock timer
(1) Be sure to data reading in the order of low-order data (TM0–TM3) then high-order data (TM4–TM7).
(2) When the clock timer has been reset, the interrupt factor flag (IT) may sometimes be set to "1". Conse-
quently, perform flag reading (reset the flag) as necessary at reset.
Serial interface
(1) Perform data writing/reading to data registers SD0–SD7 only while the serial interface is halted
(SCTRG = "0").
(2) As a trigger condition, it is required that data writing or reading on data registers SD0–SD7 be per-
formed prior to writing "1" to SCTRG. (The internal circuit of the serial interface is initiated through
data writing/reading on data registers SD0–SD7.) Supply trigger only once every time the serial
interface is placed in the RUN state. Moreover, when the synchronous clock SCLK is external clock,
start to input the external clock after the trigger.
(3) When using the serial interface in the master mode and FOUT frequency is set to OSC3, it is necessary
to turn the OSC3 oscillation ON, prior to using the serial interface.
It takes at least 5 msec from the time the OSC3 oscillation circuit goes ON until the oscillation stabilizes.
Consequently, when starting the serial input/output, do this after a minimum of 5 msec have elapsed
since the OSC3 oscillation went ON.
Further, the oscillation stabilization time varies depending on the external oscillator characteristics and
conditions of use, so allow ample margin when setting the wait time. (refer to the oscillation start time
example indicated in Chapter 7, "ELECTRICAL CHARACTERISTICS".)
At initial reset, the OSC3 oscillation circuit is set to OFF status.
R/F converter
(1) Depending on the initial value of the measurement counter (MC), the measurement counter (MC) or the
time base counter may overflow while the CR oscillation clock is being counted. When setting the initial
value, pay attention to CR oscillation frequency, its fluctuation range and the input clock frequency of
the time base counter. If an overflow occurs, R/F conversion is terminated immediately. When the R/F
conversion result (measurement counter value) is read, check the overflow flags (OVMC and OVTBC).
(2) When an interrupt occurs by the counter overflow, the same interrupt will occur if the overflow flag
(OVMC or OVTBC) is not reset. Be sure to check and reset to "0" (writing "1") the overflow flag when
the R/F converter interrupt occurs.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S1C62A33D | 4-BIT, MROM, 0.6 MHz, MICROCONTROLLER, UUC86 |
| S1C62N82F | 4-BIT, MROM, 0.032 MHz, MICROCONTROLLER, PQFP80 |
| S1C63158F0A0100 | 4-BIT, FLASH, 4.2 MHz, MICROCONTROLLER, PQFP100 |
| S1C63358F0A0100 | 4-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP100 |
| S1C63406F | 4-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PQFP128 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S1C63004 | 制造商:EPSON 制造商全稱:EPSON 功能描述:CMOS 4-bit Single Chip Microcontroller |
| S1C63008 | 制造商:EPSON 制造商全稱:EPSON 功能描述:CMOS 4-bit Single Chip Microcontroller |
| S1C63016 | 制造商:EPSON 制造商全稱:EPSON 功能描述:CMOS 4-bit Single Chip Microcontroller |
| S1C63158 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63408 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。