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參數(shù)資料
| 型號： | S1C62920D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 1.3 MHz, MICROCONTROLLER, UUC63 |
| 封裝： | DIE-63 |
| 文件頁數(shù)： | 28/78頁 |
| 文件大?。?/td> | 874K |
| 代理商： | S1C62920D |
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26
EPSON
S1C62920 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (I/O Ports)
When reading data out
When "1" is read:
High level
When "0" is read:
Low level
When the I/O port is in the input mode the voltage level being input to the port terminal can be read out;
in the output mode the register value can be read. When the terminal voltage in the input mode is high
(VDD) the port data that can be read is "1", and when the terminal voltage is low (VSS) the data is "0".
When pull up is set by the mask option, the built-in pull up resistor goes ON during input mode, so that
the I/O port terminal is pulled up. The gate floating has not occur by the input control signal even if no
pull up resistor is set.
When input terminals are changed from low to high by pull up resistor, the rise of the waveform is delayed
on account of the time constant of the pull up resistor and input gate capacitance. Hence, when fetching
data during input mode, set an appropriate wait time.
Particular care needs to be taken of the key scan during key matrix configuration.
Make this waiting time the amount of time or more calculated by the following expression.
Waiting time = RIN
× (CIN + load capacitance on board) × 1.6 [sec]
RIN: pull up resistance (Max. value)
CIN: terminal capacitance (Max. value)
IOC00–IOC03, IOC10–IOC13: I/O control registers (B0H, B4H)
The input and output modes of the I/O ports can be set with these registers.
When "1" is written:
Output mode
When "0" is written:
Input mode
Reading:
Valid
The input and output modes of the I/O ports are set in units of one bit. IOC00–IOC03 and IOC10–IOC13
set the mode for P00–P03 and P10–P13, respectively.
Writing "1" to the I/O control register makes the corresponding I/O port enter the output mode, and
writing "0" induces the input mode.
At initial reset, these registers are set to "0", so the I/O ports are in the input mode.
4.6.5 Programming note
When input terminals are changed from low to high by pull up resistor, the rise of the waveform is delayed
on account of the time constant of the pull up resistor and input gate capacitance. Hence, when fetching
data during input mode, set an appropriate wait time.
Particular care needs to be taken of the key scan during key matrix configuration.
Make this waiting time the amount of time or more calculated by the following expression.
Waiting time = RIN
× (CIN + load capacitance on board) × 1.6 [sec]
RIN: pull up resistance (Max. value)
CIN: terminal capacitance (Max. value)
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