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參數(shù)資料
| 型號： | S1C62920D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 1.3 MHz, MICROCONTROLLER, UUC63 |
| 封裝： | DIE-63 |
| 文件頁數(shù)： | 44/78頁 |
| 文件大?。?/td> | 874K |
| 代理商： | S1C62920D |
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S1C62920 TECHNICAL MANUAL
EPSON
41
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Serial Interface)
During reading operation
When "1" is read:
High level
When "0" is read:
Low level
The serial data input from the SIN (P10) terminal can be read by this register.
The data converted to parallel data, as high (VDD) level bit "1" and as low (VSS) level bit "0" input from SIN
(P10) terminal. Perform data reading only while the serial interface is halted (i.e., the synchronous clock is
neither being input or output).
At initial reset, these registers will be undefined.
EISIF: Interrupt mask register (F0HD0)
This is the interrupt mask register of the serial interface.
When "1" is written:
Enabled
When "0" is written:
Masked
Reading:
Valid
With this register, masking of the serial interface interrupt can be selected.
At initial reset, this register is set to "0".
ISIF: Interrupt factor flag (F8HD0)
This is the interrupt factor flag of the serial interface.
When "1" is read:
Interrupt has occurred
When "0" is read:
Interrupt has not occurred
Writing:
Invalid
From the status of this flag, the software can decide whether the serial interface interrupt.
The interrupt factor flag is reset when it has been read out.
Note, however, that even if the interrupt is masked, this flag will be set to "1" after the 8 bits data input/
output.
Reading of interrupt factor flag is available at EI, but be careful in the following cases.
If the interrupt mask register value corresponding to the interrupt factor flag to be read is set to "1", an
interrupt request will be generated by the interrupt factor flag set timing, or an interrupt request will not be
generated.
At initial reset, this flag is set to "0".
4.9.6 Programming notes
(1) Perform data writing/reading to data registers SD0–SD7 only while the serial interface is halted
(SCTRG = "0").
(2) As a trigger condition, it is required that data writing or reading on data registers SD0–SD7 be per-
formed prior to writing "1" to SCTRG. (The internal circuit of the serial interface is initiated through
data writing/reading on data registers SD0–SD7.) Supply trigger only once every time the serial
interface is placed in the RUN state. Moreover, when the synchronous clock SCLK is external clock,
start to input the external clock after the trigger.
(3) When using the serial interface in the master mode and FOUT frequency is set to OSC3, it is necessary
to turn the OSC3 oscillation ON, prior to using the serial interface.
It takes at least 5 msec from the time the OSC3 oscillation circuit goes ON until the oscillation stabilizes.
Consequently, when starting the serial input/output, do this after a minimum of 5 msec have elapsed
since the OSC3 oscillation went ON.
Further, the oscillation stabilization time varies depending on the external oscillator characteristics and
conditions of use, so allow ample margin when setting the wait time. (refer to the oscillation start time
example indicated in Chapter 7, "ELECTRICAL CHARACTERISTICS".)
At initial reset, the OSC3 oscillation circuit is set to OFF status.
(4) Reading of interrupt factor flag is available at EI, but be careful in the following cases.
If the interrupt mask register value corresponding to the interrupt factor flag to be read is set to "1", an
interrupt request will be generated by the interrupt factor flag set timing, or an interrupt request will
not be generated.
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