參數(shù)資料
型號： PSD833F2-15M
元件分類： 微控制器/微處理器
英文描述： 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52
封裝： PLASTIC, QFP-52
文件頁數(shù)： 64/122頁
文件大小： 489K
代理商： PSD833F2-15M
PSD8XXF Family
Preliminary Information
42
The
PSD8XXF
Functional
Blocks
(cont.)
9.3 Microcontroller Bus Interface
The “no-glue logic” PSD8XXF Microcontroller Bus Interface can be directly connected to
most popular microcontrollers and their control signals. Key 8-bit microcontrollers with their
bus types and control signals are shown in Table 17. The interface type is specified using
the PSDsoft Configuration.
Data
Bus
MCU
Width
CNTL0
CNTL1
CNTL2
PC7
PD0**
ADIO0
PA3-PA0 PA7-PA3
8031
8
WR
RD
PSEN
*
ALE
A0
**
80C51XA
8
WR
RD
PSEN
*
ALE
A4
A3-A0
*
80C251
8
WR
PSEN
**
ALE
A0
**
80C251
8
WR
RD
PSEN
*
ALE
A0
**
80198
8
WR
RD
**
ALE
A0
**
68HC11
8
R/W
E
**
AS
A0
**
68HC912
8
R/W
E
*
DBE
AS
A0
**
Z80
8
WR
RD
**
*
A0
D3-D0
D7-D4
Z8
8
R/W
DS
**
AS
A0
**
68330
8
R/W
DS
**
AS
A0
**
M37702M2
8
R/W
E
**
ALE
A0
D3-D0
D7-D4
Table 17. Microcontrollers and their Control Signals
**Unused CNTL2 pin can be configured as CPLD input. Other unused pins (PC7, PD0, PA3-0) can be
**configured for other I/O functions.
**ALE/AS input is optional for microcontrollers with a non-multiplexed bus
9.3.1. PSD8XXF Interface to a Multiplexed 8-Bit Bus
Figure 15 shows an example of a system using a microcontroller with an 8-bit multiplexed
bus and a PSD8XXF. The ADIO port on the PSD8XXF is connected directly to the
microcontroller address/data bus. ALE latches the address lines internally. Latched
addresses can be brought out to Port A or B. The PSD8XXF drives the ADIO data bus
only when one of its internal resources is accessed and the RD input is active. Should the
system address bus exceed sixteen bits, Ports A, B, C, or D may be used as additional
address inputs.
9.3.2. PSD8XXF Interface to a Non-Multiplexed 8-Bit Bus
Figure 16 shows an example of a system using a microcontroller with an 8-bit
non-multiplexed bus and a PSD8XXF. The address bus is connected to the ADIO Port,
and the data bus is connected to Port A. Port A is in tri-state mode when the PSD8XXF is
not accessed by the microcontroller. Should the system address bus exceed sixteen bits,
Ports B, C, or D may be used for additional address inputs.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD833F2-90J 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD833F2-90JI 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD833F2-90M 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD833F2-90MI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD834F2-15M 制造商:STMicroelectronics 功能描述:Flash In-System Programmable Peripherals 52-Pin PQFP
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