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參數(shù)資料
| 型號： | PSD833F2-15M |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52 |
| 封裝： | PLASTIC, QFP-52 |
| 文件頁數(shù)： | 38/122頁 |
| 文件大?。?/td> | 489K |
| 代理商： | PSD833F2-15M |
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PSD8XXF Family
Preliminary Information
18
FS0-7
or
Instruction
CSBOOT0-3
Cycle 1 Cycle 2 Cycle 3
Cycle 4
Cycle5
Cycle 6
Cycle 7
Read (Note 5)
1
“Read”
RA RD
Read Main Flash ID
1
AAh
55h
90h
“Read”
(Notes 6,13)
@555h
@AAAh
@555h
ID
@x01h
Read Sector Protection
1
AAh
55h
90h
“Read”
(Notes 6,8,13)
@555h
@AAAh
@555h
00h or 01h
@x02h
Program a Flash Byte
1
AAh
55h
A0h
PD@PA
@555h
@AAAh
@555h
Erase One Flash Sector
1
AAh
55h
80h
AAh
55h
30h
@555h
@AAAh
@555h
@AAAh
@SA
@next SA
(Note 7)
Erase Flash Block
1
AAh
55h
80h
AAh
55h
10h
(Bulk Erase)
@555h
@AAAh
@555h
@AAAh
@555h
Suspend Sector Erase
1
B0h
(Note 11)
@xxxh
Resume Sector Erase
1
30h
(Note 12)
@xxxh
Reset (Note 6)
1
F0 @ any
address
Unlock Bypass
1
AAh
55h
20h
(Note 14)
@555h
@AAAh
@555h
Unlock Bypass Program
1
A0h
PD@PA
(Note 9,14)
@xxxh
Unlock Bypass Reset
1
90h
00h
(Note 10,14)
@xxxh
Table 9. Instructions
X
= Don’t Care.
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of the WR#
(CNTL0) pulse.
PD = Data to be programmed at location PA. Data is latched o the rising edge of WR# (CNTL0) pulse.
SA = Address of the sector to be erased or verified. The chip select (FS0-7 or CSBOOT0-3) of the sector to be
erased must be active (high).
NOTES:
1.
All bus cycles are write bus cycle except the ones with the “read” label.
2.
All values are in hexadecimal.
3.
FS0-7 and CSBOOT0-3 are active high and are defined in PSDsoft.
4.
Only Address bits A11-A0 are used in Instruction decoding. A15-12 (or A16-A12) are don’t care.
5.
No unlock or command cycles required when device is in read mode.
6.
The Reset command is required to return to the read mode after reading the Flash ID, Sector Protect status
or if DQ5 (error flag) goes high.
7.
Additional sectors to be erased must be entered within 80s.
8.
The data is 00h for an unprotected sector and 01h for a protected sector. In the fourth cycle, the sector chip
select is active and (A1 = 1, A0 = 0).
9.
The Unlock Bypass command is required prior to the Unlock Bypass Program command.
10. The Unlock Bypass Reset command is required to return to reading array data when the device is in the
Unlock Bypass mode.
11. The system may read and program functions in non-erasing sectors, read the Flash ID or read the Sector
Protect status, when in the Erase Suspend mode. The erase Suspend command is valid only during a sector
erase operation.
12. The Erase Resume command is valid only during the Erase Suspend mode.
13. The MCU cannot invoke these instructions while executing code from the same Flash memory for which the
instruction is intended. The MCU must fetch, for example, codes from the Boot block when reading the
Sector Protection Status of the main Flash.
14. Available to PSD8X4F device only.
The
PSD8XXF
Functional
Blocks
(cont.)
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PSD833F2-90J | 功能描述:CPLD - 復雜可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| PSD833F2-90JI | 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
| PSD833F2-90M | 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
| PSD833F2-90MI | 功能描述:CPLD - 復雜可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| PSD834F2-15M | 制造商:STMicroelectronics 功能描述:Flash In-System Programmable Peripherals 52-Pin PQFP |
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