參數(shù)資料
型號(hào): PSD833F2-15M
元件分類: 微控制器/微處理器
英文描述: 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52
封裝: PLASTIC, QFP-52
文件頁數(shù): 29/122頁
文件大小: 489K
代理商: PSD833F2-15M
PSD8XXF Family
Preliminary Information
10
The following table describes the pin names and pin functions of the PSD8XXF. Pins that
have multiple names and/or functions are defined using PSD Configuration.
7.0
Table 5.
PSD8XXF
Pin
Descriptions
Pin Name
Pin* Type
Description
ADIO0-7
30-37
I/O
This is the lower Address/Data port. Connect your MCU
address or address/data bus according to the following rules:
1. If your MCU has a multiplexed address/data bus where
the data is multiplexed with the lower address bits,
connect AD[0:7] to this port.
2. If your MCU does not have a multiplexed address/data
bus, or you are using an 80C251 in page mode, connect
A[0:7] to this port.
3. If you are using an 80C51XA in burst mode, connect
A4/D0 through A11/D7 to this port.
ALE or AS latches the address. The PSD drives data out only
if the read signal is active and one of the PSD functional
blocks was selected. The addresses on this port are passed
to the PLDs.
ADIO8-15
39-46
I/O
This is the upper Address/Data port. Connect your MCU
address or address/data bus according to the following rules:
1. If your MCU has a multiplexed address/data bus where
the data is multiplexed with the lower address bits,
connect A[8:15] to this port.
2. If your MCU does not have a multiplexed address/data
bus, connect A[8:15] to this port.
3. If you are using an 80C251 in page mode, connect
AD[8:15] to this port.
4. If you are using an 80C51XA in burst mode, connect
A12/D8 through A19/D15 to this port.
ALE or AS latches the address. The PSD drives data out only
if the read signal is active and one of the PSD functional
blocks was selected. The addresses on this port are passed
to the PLDs.
CNTL0
47
I
The following control signals can be connected to this port,
based on your MCU:
1. WR — active-low write input.
2. R_W — active-high read/active low write input.
This pin is connected to the PLDs. Therefore, these signals
can be used in decode and other logic equations.
CNTL1
50
I
The following control signals can be connected to this port,
based on your MCU:
1. RD — active-low read input.
2. E — E clock input.
3. DS — active-low data strobe input.
4. PSEN — connect PSEN to this port when it is being used
as an active-low read signal. For example, when the
80C251 outputs more than 16 address bits, PSEN is
actually the read signal.
This pin is connected to the PLDs. Therefore, these
signals can be used in decode and other logic equations.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD833F2-90J 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD833F2-90JI 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD833F2-90M 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD833F2-90MI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD834F2-15M 制造商:STMicroelectronics 功能描述:Flash In-System Programmable Peripherals 52-Pin PQFP