參數(shù)資料
型號(hào)： PSD833F2-15M
元件分類： 微控制器/微處理器
英文描述： 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52
封裝： PLASTIC, QFP-52
文件頁(yè)數(shù)： 35/122頁(yè)
文件大?。?/td> 489K
代理商： PSD833F2-15M
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)當(dāng)前第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)
i
PSD8XXF2 PSD8XXF3
PSD8XXF4 PSD8XXF5
Flash In-System-Programmable Microcontroller Peripherals
Table of Contents
1.0
Introduction ...........................................................................................................................................................1
2.0
Key Features ........................................................................................................................................................2
PSD8XXF Block Diagram...............................................................................................................................4
3.0
General Information ..............................................................................................................................................5
4.0
PSD8XXF Family ..................................................................................................................................................5
5.0
PSD8XXF Architectural Overview ........................................................................................................................6
5.1 Memory ...................................................................................................................................................6
5.2 Page Register .........................................................................................................................................6
5.3 PLDs .......................................................................................................................................................6
5.4 I/O Ports..................................................................................................................................................7
5.5 Microcontroller Bus Interface ..................................................................................................................7
5.6 JTAG Port ...............................................................................................................................................7
5.7 In-System Programming .........................................................................................................................8
5.8 Power Management................................................................................................................................8
6.0
Development System............................................................................................................................................9
7.0
PSD8XXF Pin Descriptions ................................................................................................................................10
8.0
PSD8XXF Register Description and Address Offset ..........................................................................................14
9.0
PSD8XXF Functional Blocks ..............................................................................................................................15
9.1 Memory Blocks .....................................................................................................................................15
9.1.1 Main Flash and Flash Boot Memory Description........................................................................15
9.1.2 SRAM .........................................................................................................................................27
9.1.3 Memory Select Signals...............................................................................................................27
9.1.4 Page Register.............................................................................................................................30
9.2 PLDs .....................................................................................................................................................31
9.2.1 Decode PLD (DPLD) ..................................................................................................................33
9.2.2 Complex PLD (CPLD) ................................................................................................................33
9.3 Microcontroller Bus Interface ................................................................................................................42
9.3.1 PSD8XXF Interface to a Multiplexed 8-Bit Bus ..........................................................................42
9.3.2 PSD8XXF Interface to a Non-Multiplexed 8-bit Bus...................................................................42
9.3.3 Data Byte Enable Reference......................................................................................................45
9.3.4 Microcontroller Interface Examples ............................................................................................45
9.4 I/O Ports................................................................................................................................................50
9.4.1 General Port Architecture...........................................................................................................50
9.4.2 Port Operating Modes ................................................................................................................52
9.4.3 Port Configuration Registers (PCRs) .........................................................................................55
9.4.4 Port Data Registers ....................................................................................................................58
9.4.5 Ports A and B – Functionality and Structure ............................................................................59
9.4.6 Port C – Functionality and Structure ........................................................................................61
9.4.7 Port D – Functionality and Structure ........................................................................................61
9.5 Power Management..............................................................................................................................65
9.5.1 Automatic Power Down (APD) Unit and Power Down Mode .....................................................65
9.5.2 Other Power Saving Options......................................................................................................69
9.5.3 Reset and Power On Requirement ............................................................................................70
相關(guān)PDF資料
PDF描述
PSD835G2V-B-90MI Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD835G2V-B-90U Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD835G2V-B-90UI Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD835G2V-C-12B81I Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD835G2V-C-12M Configurable Memory System on a Chip for 8-Bit Microcontrollers
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD833F2-90J 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD833F2-90JI 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD833F2-90M 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD833F2-90MI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD834F2-15M 制造商:STMicroelectronics 功能描述:Flash In-System Programmable Peripherals 52-Pin PQFP
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*