參數(shù)資料
型號: PSD4235G2-90UT
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 256K X 16 FLASH, 52 I/O, PIA-GENERAL PURPOSE, PQFP80
封裝: PLASTIC, TQFP-80
文件頁數(shù): 76/100頁
文件大?。?/td> 933K
代理商: PSD4235G2-90UT
77/100
PSD4235G2
AC/DC PARAMETERS
These tables describe the AD and DC parameters
of the PSD4235G2:
DC Electrical Specification
AC Timing Specification
PLD Timing
Combinatorial Timing
Synchronous Clock Mode
Asynchronous Clock Mode
Input Macrocell Timing
MCU Timing
READ Timing
–WRITE Timing
Peripheral Mode Timing
Power-down and Reset Timing
The following are issues concerning the parame-
ters presented:
In the DC specification the supply current is
given for different modes of operation. Before
calculating the total power consumption,
determine the percentage of time that the PSD
is in each mode. Also, the supply power is
considerably different if the Turbo Bit is 0.
The AC power component gives the PLD,
Flash memory, and SRAM mA/MHz
specification. Figure 35 show the PLD mA/
MHz as a function of the number of Product
Terms (PT) used.
In the PLD timing parameters, add the
required delay when Turbo Bit is 0.
Figure 35. PLD ICC /Frequency Consumption
AI05739
0
10
20
30
40
50
60
70
80
90
100
110
0
5
10
15
20
25
HIGHEST COMPOSITE FREQUENCY AT PLD INPUTS (MHz)
Ic
c
-
(m
A)
PT 100%
PT 25%
Vcc = 5V
TURBO ON (100%)
TURBO ON (25%)
TURBO OFF
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