參數(shù)資料
型號(hào)： PSD4235G2-90UT
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 256K X 16 FLASH, 52 I/O, PIA-GENERAL PURPOSE, PQFP80
封裝： PLASTIC, TQFP-80
文件頁(yè)數(shù)： 22/100頁(yè)
文件大?。?/td> 933K
代理商： PSD4235G2-90UT
PSD4235G2
28/100
INSTRUCTIONS
An instruction consists of a sequence of specific
operations. Each received byte is sequentially de-
coded by the PSD and not executed as a standard
WRITE operation. The instruction is executed
when the correct number of bytes are properly re-
ceived and the time between two consecutive
bytes is shorter than the time-out period. Some in-
structions are structured to include READ opera-
tions after the initial WRITE operations.
The instruction must be followed exactly. Any in-
valid combination of instruction bytes or time-out
between two consecutive bytes while addressing
Flash memory resets the device logic into READ
mode (Flash memory is read like a ROM device).
The PSD supports the instructions summarized in
■
Erase memory by chip or sector
■
Suspend or resume sector erase
■
Program a Word
■
Reset to READ mode
■
Read primary Flash Identifier value
■
Read Sector Protection Status
■
Bypass
These instructions are detailed in Table 29., page
27. For efficient decoding of the instructions, the
first two bytes of an instruction are the coded cy-
cles and are followed by an instruction byte or con-
firmation byte. The coded cycles consist of writing
the data AAh to address XAAAh during the first cy-
cle and data 55h to address X554h during the sec-
ond cycle (unless the Bypass instruction feature is
used, as described later). Address signals A15-
A12 are Don’t Care during the instruction WRITE
cycles. However, the appropriate Sector Select
signal (FS0-FS7, or CSBOOT0-CSBOOT3) must
be selected.
The primary and secondary Flash memories have
the same instruction set (except for Read Primary
Flash Identifier). The Sector Select signals deter-
mine which Flash memory is to receive and exe-
cute the instruction. The primary Flash memory is
selected if any one of its Sector Select signals
(FS0-FS7) is High, and the secondary Flash mem-
ory is selected if any one of its Sector Select sig-
nals (CSBOOT0-CSBOOT3) is High.
Power-up Condition
The PSD internal logic is reset upon Power-up to
the READ mode. Sector Select (FS0-FS7 and
CSBOOT0-CSBOOT3) must be held Low, and
Write Strobe (WR/WRL, CNTL0) High, during
Power-up for maximum security of the data con-
tents and to remove the possibility of data being
written on the first edge of Write Strobe (WR/WRL,
CNTL0). Any WRITE cycle initiation is locked
when VCC is below VLKO.
Reading Flash Memory
Under typical conditions, the MCU may read the
primary Flash memory, or secondary Flash mem-
ory, using READ operations just as it would a
ROM or RAM device. Alternately, the MCU may
use READ operations to obtain status information
about a Program or Erase cycle that is currently in
progress. Lastly, the MCU may use instructions to
read special data from these memory blocks. The
following sections describe these READ functions.
Read Memory Contents
Primary Flash memory and secondary Flash
memory are placed in the READ mode after Pow-
er-up, chip reset, or a Reset Flash instruction (see
Table 29). The MCU can read the memory con-
tents of the primary Flash memory, or the second-
ary Flash memory by using READ operations any
time the READ operation is not part of an instruc-
tion.
Read Primary Flash Identifier
The primary Flash memory identifier is read with
an instruction composed of 4 operations: 3 specific
WRITE operations and a READ operation (see Ta-
ble 29). The identifier for the primary Flash memo-
ry is E8h. The secondary Flash memory does not
support this instruction.
Read Memory Sector Protection Status
The Flash memory Sector Protection Status is
read with an instruction composed of four opera-
tions: three specific WRITE operations and a
READ operation (see Table 29). The READ oper-
ation produces 01h if the Flash memory sector is
protected, or 00h if the sector is not protected.
The sector protection status for all NVM blocks
(primary Flash memory, or secondary Flash mem-
ory) can be read by the MCU accessing the Flash
Protection and Flash Boot Protection registers in
PSD I/O space. See the section entitled “Flash
definitions.
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