參數(shù)資料
型號(hào): PSD4235G2-90UT
廠商: STMICROELECTRONICS
元件分類(lèi): 微控制器/微處理器
英文描述: 256K X 16 FLASH, 52 I/O, PIA-GENERAL PURPOSE, PQFP80
封裝: PLASTIC, TQFP-80
文件頁(yè)數(shù): 58/100頁(yè)
文件大?。?/td> 933K
代理商: PSD4235G2-90UT
PSD4235G2
60/100
MCU I/O Mode
In the MCU I/O mode, the MCU uses the PSD
Ports to expand its own I/O ports. By setting up the
CSIOP space, the ports on the PSD are mapped
into the MCU address space. The addresses of
the ports are listed in Table 6.
A port pin can be put into MCU I/O mode by writing
a ’0’ to the corresponding bit in the Control Regis-
ter (for Ports E, F and G). The MCU I/O direction
may be changed by writing to the corresponding
bit in the Direction Register, or by the output en-
able product term. See the section entitled “Port
configured as an output, the content of the Data
Out Register drives the pin. When configured as
an input, the MCU can read the port input through
the Data In buffer. See Figure 27.
Ports A, B and C do not have Control Registers,
and are in MCU I/O mode by default. They can be
used for PLD I/O if they are specified in PSDsoft
Express.
PLD I/O Mode
The PLD I/O Mode uses a port as an input to the
CPLD’s Input Macrocells (IMC), and/or as an out-
put from the CPLD’s Output Macrocells (OMC).
The output can be tri-stated with a control signal.
This output enable control signal can be defined
by a product term from the PLD, or by resetting the
corresponding bit in the Direction Register to ’0’.
The corresponding bit in the Direction Register
must not be set to ’1’ if the pin is defined for a PLD
input signal in PSDsoft Express. The PLD I/O
mode is specified in PSDsoft Express by declaring
the port pins, and then specifying an equation in
PSDsoft Express.
Address Out Mode
For MCUs with a multiplexed address/data bus,
Address Out mode can be used to drive latched
addresses onto the port pins. These port pins can,
in turn, drive external devices. Either the output
enable or the corresponding bits of both the Direc-
tion Register and Control Register must be set to
a ’1’ for pins to use Address Out mode. This must
be done by the MCU at run-time. See Table 41 for
the address output pin assignments on Ports E, F
and G for various MCUs.
Note: Do not drive address signals with Address
Out Mode to an external memory device if it is in-
tended for the MCU to Boot from the external de-
vice. The MCU must first Boot from PSD memory
so the Direction and Control register bits can be
set.
Table 39. Port Operating Modes
Note: 1. Can be multiplexed with other I/O functions.
2. Available to Motorola 16-bit 683xx and HC16 families of MCUs.
Port Mode
Port A
Port B
Port C
Port D
Port E
Port F
Port G
MCU I/O
Yes
PLD I/O
McellA Outputs
McellB Outputs
Additional Ext. CS Outputs
PLD Inputs
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Address Out
No
Yes (A7 - 0)
or (A15 - 8)
Address In
Yes
No
Yes
No
Data Port
No
Yes
Peripheral I/O
Yes
No
Yes
No
Yes
No
JTAG ISP
No
Yes1
No
MCU Reset Mode2
No
Yes
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