參數(shù)資料
型號(hào)： PSD4235G2-90UT
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 256K X 16 FLASH, 52 I/O, PIA-GENERAL PURPOSE, PQFP80
封裝： PLASTIC, TQFP-80
文件頁數(shù)： 39/100頁
文件大?。?/td> 933K
代理商： PSD4235G2-90UT
43/100
PSD4235G2
Product Term Allocator
The CPLD has a Product Term Allocator. PSDsoft
Express, uses the Product Term Allocator to bor-
row and place product terms from one Macrocell to
another. The following list summarizes how prod-
uct terms are allocated:
■
McellA0-McellA7 all have three native product
terms and may borrow up to six more
■
McellB0-McellB3 all have four native product
terms and may borrow up to five more
■
McellB4-McellB7 all have four native product
terms and may borrow up to six more.
Each Macrocell may only borrow product terms
from certain other Macrocells. Product terms al-
ready in use by one Macrocell are not available for
another Macrocell.
If an equation requires more product terms than
are available to it, then “external” product terms
are required, which consume other Output Macro-
cells (OMC). If external product terms are used,
extra delay is added for the equation that required
the extra product terms. This is called product term
expansion. PSDsoft Express performs this expan-
sion as needed.
Loading and Reading the Output Macrocells
(OMC)
The Output Macrocells (OMC) block occupies a
memory location in the MCU address space, as
defined by the CSIOP (see the section entitled “I/
O Ports”, on page 58). The flip-flops in each of the
16 Output Macrocells (OMC) can be loaded from
the data bus by a MCU. Loading the Output Mac-
rocells (OMC) with data from the MCU takes prior-
ity over internal functions. As such, the preset,
clear, and clock inputs to the flip-flop can be over-
ridden by the MCU. The ability to load the flip-flops
and read them back is useful in such applications
as loadable counters and shift registers, mailbox-
es, and handshaking protocols.
Data is loaded to the Output Macrocells (OMC) on
the trailing edge of Write Strobe (WR/WRL,
CNTL0).
The OMC Mask Register
There is one Mask Register for each of the two
groups of eight Output Macrocells (OMC). The
Mask Registers can be used to block the loading
of data to individual Output Macrocells (OMC).
The default value for the Mask Registers is 00h,
which allows loading of the Output Macrocells
(OMC). When a given bit in a Mask Register is set
to a '1,' the MCU is blocked from writing to the as-
sociated Output Macrocells (OMC). For example,
suppose McellA0-McellA3 are being used for a
state machine. You would not want an MCU
WRITE to McellA to overwrite the state machine
registers. Therefore, you would want to load the
Mask Register for McellA (Mask Macrocell A) with
the value 0Fh.
The Output Enable of the OMC
The Output Macrocells (OMC) can be connected
to an I/O port pin as a PLD output. The output en-
able of each port pin driver is controlled by a single
product term from the AND Array, ORed with the
Direction Register output. The pin is enabled upon
Power-up if no output enable equation is defined
and if the pin is declared as a PLD output in PSD-
soft Express.
If the Output Macrocell (OMC) output is declared
as an internal node and not as a port pin output in
the PSDabel file, then the port pin can be used for
other I/O functions. The internal node feedback
can be routed as an input to the AND Array.
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