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PSD4235G2
ERASING FLASH MEMORY
Flash Bulk Erase
The Flash Bulk Erase instruction uses six WRITE
operations followed by a READ operation of the
status register, as described in
Table 29. If any
byte of the Bulk Erase instruction is wrong, the
Bulk Erase instruction aborts and the device is re-
set to the Read Memory mode.
During a Bulk Erase, the memory status may be
checked by reading the Error Flag Bit (DQ5/
DQ13), the Toggle Flag Bit (DQ6/DQ14), and the
Data Polling Bit (DQ7/DQ15), as detailed in the
returns a ’1’ if there has been an Erase Failure
(maximum number of Erase cycles have been ex-
ecuted).
It is not necessary to program the memory with
00h because the PSD automatically does this be-
fore erasing to 0FFh.
During execution of the Bulk Erase instruction, the
Flash memory does not accept any instructions.
Flash Sector Erase. The Sector Erase instruc-
tion uses six WRITE operations, as described in
Table 29. Additional Flash Sector Erase confirm
commands and Flash memory sector addresses
can be written subsequently to erase other Flash
memory sectors in parallel, without further coded
cycles, if the additional commands are transmitted
in a shorter time than the time-out period of about
100s. The input of a new Sector Erase command
restarts the time-out period.
The status of the internal timer can be monitored
through the level of the Erase Time-out Flag Bit
(DQ3/DQ11). If the Erase Time-out Flag Bit (DQ3/
DQ11) is 0, the Sector Erase instruction has been
received and the time-out period is counting. If the
Erase Time-out Flag Bit (DQ3/DQ11) is 1, the
time-out period has expired and the PSD is busy
erasing the Flash memory sector(s). Before and
during Erase time-out, any instruction other than
Suspend Sector Erase and Resume Sector Erase,
abort the cycle that is currently in progress, and re-
set the device to READ mode. It is not necessary
to program the Flash memory sector with 00h as
the PSD does this automatically before erasing.
During a Sector Erase, the memory status may be
checked by reading the Error Flag Bit (DQ5/
DQ13), the Toggle Flag Bit (DQ6/DQ14), and the
Data Polling Bit (DQ7/DQ15), as detailed in the
During execution of the Erase cycle, the Flash
memory accepts only Reset and Suspend Sector
Erase instructions. Erasure of one Flash memory
sector may be suspended, in order to read data
from another Flash memory sector, and then re-
sumed.
Suspend Sector Erase
When a Sector Erase cycle is in progress, the Sus-
pend Sector Erase instruction can be used to sus-
pend the cycle by writing 0B0h to any even
address when an appropriate Sector Select (FS0-
FS7 or CSBOOT0-CSBOOT3) is High. (See
Table29). This allows reading of data from another
Flash memory sector after the Erase cycle has
been suspended. Suspend Sector Erase is ac-
cepted only during the Flash Sector Erase instruc-
tion execution and defaults to READ mode. A
Suspend Sector Erase instruction executed during
an Erase time-out period, in addition to suspend-
ing the Erase cycle, terminates the time out period.
The Toggle Flag Bit (DQ6/DQ14) stops toggling
when the PSD internal logic is suspended. The
status of this bit must be monitored at an address
within the Flash memory sector being erased. The
Toggle Flag Bit (DQ6/DQ14) stops toggling be-
tween 0.1s and 15s after the Suspend Sector
Erase instruction has been executed. The PSD is
then automatically set to READ mode.
If an Suspend Sector Erase instruction was exe-
cuted, the following rules apply:
–
Attempting to read from a Flash memory
sector that was being erased outputs invalid
data.
–
Reading from a Flash memory sector that was
not being erased is valid.
–
The Flash memory cannot be programmed,
and only responds to Resume Sector Erase
and Reset instructions (READ is an operation
and is allowed).
–
If a Reset instruction is received, data in the
Flash memory sector that was being erased is
invalid.
Resume Sector Erase
If a Suspend Sector Erase instruction was previ-
ously executed, the Erase cycle may be resumed
with this instruction. The Resume Sector Erase in-
struction consists of writing 030h to any even ad-
dress while an appropriate Sector Select (FS0-
FS7 or CSBOOT0-CSBOOT3) is High. (See
Table