參數(shù)資料
型號: PC7410M16
英文描述: PC7410M16 [Updated 12/02. 35 Pages]
中文描述: PC7410M16 [更新12/02。 35頁]
文件頁數(shù): 3/35頁
文件大小: 361K
代理商: PC7410M16
3
PC7410M16
2183A–HIREL–12/02
Features
This section summarizes features of the PC7410M16’s implementation of the PowerPC
architecture. Major features of the PC7410M16 are as follows:
Branch Processing Unit
Four instructions fetched per clock
One branch processed per cycle (plus resolving two speculations)
Up to one speculative stream in execution, one additional speculative stream
in fetch
512-entry branch history table (BHT) for dynamic prediction
64-entry, 4-way set associative branch target instruction cache (BTIC) for
eliminating branch delay slots
Dispatch Unit
Full hardware detection of dependencies (resolved in the execution units)
Dispatch two instructions to eight independent units (system, branch,
load/store, fixed-point unit 1, fixed-point unit 2, floating-point, AltiVec
permute, AltiVec ALU)
Serialization control (predispatch, postdispatch, execution serialization)
Decode
Register file access
Forwarding control
Partial instruction decode
Completion
8-entry completion buffer
Instruction tracking and peak completion of two instructions per cycle
Completion of instructions in program order while supporting out-of-order
instruction execution, completion serialization and all instruction flow
changes
Fixed-point Units (FXUs) that Share 32 GPRs for Integer Operands
Fixed-point unit 1 (FXU1) — multiply, divide, shift, rotate, arithmetic, logical
Fixed-point unit 2 (FXU2) – shift, rotate, arithmetic, logical
Single-cycle arithmetic, shifts, rotates, logical
Multiply and divide support (multi-cycle)
Early out multiply
Three-stage Floating-point Unit and a 32-entry FPR File
Support for IEEE-754 standard single- and double-precision floating-point
arithmetic
Three-cycle latency, one-cycle throughput (single or double precision)
Hardware support for divide
Hardware support for denormalized numbers
Time deterministic non-IEEE mode
System Unit
Executes CR logical instructions and miscellaneous system instructions
Special register transfer instructions
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