參數(shù)資料
型號(hào)： PC7410M16
英文描述： PC7410M16 [Updated 12/02. 35 Pages]
中文描述： PC7410M16 [更新12/02。 35頁(yè)]
文件頁(yè)數(shù)： 29/35頁(yè)
文件大?。?/td> 361K
代理商： PC7410M16
29
PC7410M16
2183A–HIREL–12/02
Figure 18.
Driver Impedance Measurement
Table 13 summarizes the signal impedance results. The impedance increases with junc-
tion temperature and is relatively unaffected by bus voltage.
Pull-up Resistor
Requirements
The PC7410M16 requires high-resistive (weak: 10 k
) pull-up resistors on several con-
trol pins of the bus interface to maintain the control signals in the negated state after
they have been actively negated and released by the PC7410M16 or other bus masters.
These pins are TS, ARTRY, SHDO and SHD1.
In addition, the PC7410M16 has one open-drain style output that requires a pull-up
resistor (weak or stronger: 4.7 k
– 10 k
) if it is used by the system. This pin is
CKSTP_OUT.
During inactive periods on the bus, the address and transfer attributes may not be
driven by any master and may therefore float in the high-impedance state for relatively
long periods of time. Since the PC7410M16 must continually monitor these signals for
snooping, this float condition may cause excessive power draw by the input receivers on
the PC7410M16 or by other receivers in the system. It is recommended that these sig-
nals be pulled up through weak (10 k
) pull-up resistors by the system, or that they may
be otherwise driven by the system during inactive periods of the bus. The snooped
address and transfer attribute inputs are A[0:31], AP[0:3], TT[0:4], and GBL.
In systems where GBL is not connected and another device may be asserting TS for a
snoopable transaction while not driving GBL to the processor, we recommend that a
strong (1 k
) pull-up resistor be used on GBL.
Table 13.
Impedance Characteristics with V
DD
= 1.8V, OV
DD
= 1.8V or 2.5V,
T
j
= -55
°
C to 125
°
C
Impedance
Processor bus
L2 Bus
Symbol
Unit
R
N
41.5 - 54.3
42.7 - 54.1
Z
0
Ohms
R
P
37.3 - 55.3
39.3 - 50
Z
0
Ohms
OV
DD
OGND
SW2
SW1
RN
RP
Pad
Data
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