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參數(shù)資料
| 型號： | PC7410M16 |
| 英文描述： | PC7410M16 [Updated 12/02. 35 Pages] |
| 中文描述： | PC7410M16 [更新12/02。 35頁] |
| 文件頁數(shù)： | 27/35頁 |
| 文件大小： | 361K |
| 代理商： | PC7410M16 |
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27
PC7410M16
2183A–HIREL–12/02
System Design
Information
PLL Power Supply
Filtering
The A
V
DD
and L2AV
DD
power signals are provided on the PC7410M16 to provide power
to the clock generation phase-locked loop and L2 cache delay-locked loop, respectively.
To ensure stability of the internal clock, the power supplied to the AV
DD
input signal
should be filtered of any noise in the 500 kHz to 10 MHz resonant frequency range of
the PLL. A circuit similar to the one shown in Figure 16 using surface mount capacitors
with minimum effective series inductance (ESL) is recommended.
The circuit should be placed as close as possible to the AV
DD
pin to minimize noise cou-
pled from nearby circuits. An identical but separate circuit should be placed as close as
possible to the L2AV
DD
pin. It is often possible to route directly from the capacitors to the
AV
DD
pin, which is on the periphery of the 360-ball CBGA footprint without the induc-
tance of vias. The L2AV
DD
pin may be more difficult to route but is proportionately less
critical.
Figure 16.
PLL Power Supply Filter Circuit
Power Supply Voltage
Sequency
The notes in Table 1 contain cautions about the sequencing of the external bus voltages
and core voltage of the PC7410M16 (when they are different). These cautions are nec-
essary for the long term reliability of the part. If they are violated, the electrostatic
discharge (ESD) protection diodes will be forward-biased and excessive current can
flow through these diodes. If the system power supply design does not control the volt-
age sequencing, one or both of the circuits of Figure 17 can be added to meet these
requirements. The MUR420 Schottky diodes of Figure 17 control the maximum potential
difference between the external bus and core power supplies on power-up and the
1N5820 diodes regulate the maximum potential difference on power-down.
Figure 17.
Example Voltage Sequencing Circuits
V
DD
10
2.2
μ
F
2.2
μ
F
GND
AV
DD
(or L2AV
DD
)
Low ESL surface mount capacitor
MUR420
MUR420
1N5820
1N5820
1.8V
2.5V
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PC7410MG400LE | 制造商:e2v technologies 功能描述:MPU 7410 RISC 64BIT 0.18UM 400MHZ 1.8V/2.5V/3.3V 360CBGA - Trays |
| PC7410MG400NE | 制造商:e2v technologies 功能描述:MPU 7410 RISC 64BIT 0.18UM 400MHZ 1.8V/2.5V/3.3V 360CBGA - Trays |
| PC7410MG450LE | 制造商:e2v technologies 功能描述:MPU 7410 RISC 64BIT 0.18UM 450MHZ 1.8V/2.5V/3.3V 360CBGA - Trays |
| PC7410MG450NE | 制造商:e2v technologies 功能描述:MPU 7410 RISC 64BIT 0.18UM 450MHZ 1.8V/2.5V/3.3V 360CBGA - Trays |
| PC7410MG500LE | 制造商:e2v Aerospace & Defense 功能描述:MPU 7410 RISC 64-Bit 0.18um 500MHz 1.8V/2.5V/3.3V 360-Pin CBGA 制造商:e2v technologies 功能描述:PC7410MG500LE - Trays |
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