參數(shù)資料
型號: MT90812
廠商: Mitel Networks Corporation
英文描述: Integrated Digital Switch (IDX)(集成數(shù)字開關)
中文描述: 綜合數(shù)字交換機(IDX的)(集成數(shù)字開關)
文件頁數(shù): 76/105頁
文件大?。?/td> 334K
代理商: MT90812
MT90812
Advance Information
72
22.29
HRA CTRL Register 3 (HC3)
The register is configured as follows:
22.30
HRA Lock Out Register 1 (HLO1)
The register is configured as follows:
22.31
HRA Lock Out Register 2 (HLO2)
The register is configured as follows:
Read/Write Address is: 52
H
Reset Value is: 00
H
Bit
Name
Description
7-4
unused
Unused
.
3-0
NTX4-1
Next TX Channel Number
. These bits represent the channel number for the next
packet to be transmitted and selects one of the first 16 timeslots of STo1, with HC1
register bit CD=0, or the last 16 timeslots with bit CD=1. NTX4 is the MSB and NTX1
is the LSB. On reset, this register is cleared.
A write to this register causes the status bit TXCHNL, readable from the HRA Status
2 register, to be reset to low.
Read/Write Address is: 53
H
Reset Value is: FF
H
Bit
Name
Description
7-0
LOC7-0
Setting any bit in this register disables reception from the corresponding channel
number. LOC0-7 correspond to channels 0 to 7 on stream STi1, with HC1 register bit
CD=0, or channels 16 to 23 with bit CD=1. On reset, this register is set, so that all
channels are disabled. Example: LOC2 is channel 2 on STi1
Read/Write Address is: 54
H
Reset Value is: FF
H
Bit
Name
Description
7-0
LOC15-8
Setting any bit in this register disables reception from the corresponding channel
number. LOC8-15 correspond to channels 8 to 15 on stream STi1, with HC1 register
bit CD=0, or channels 24 to 31 with bit CD=1. On reset, this register is set, so that all
channels are disabled.
7
6
5
4
3
2
1
0
-
-
NTX4
NTX3
NTX2
NTX1
-
-
7
6
5
4
3
2
1
0
LOC6
LOC5
LOC4
LOC3
LOC2
LOC1
LOC0
LOC7
7
6
5
4
3
2
1
0
LOC14
LOC13
LOC12
LOC11
LOC10
LOC9
LOC8
LOC15
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