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參數(shù)資料
| 型號(hào)： | MT90812 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Integrated Digital Switch (IDX)(集成數(shù)字開關(guān)) |
| 中文描述： | 綜合數(shù)字交換機(jī)（IDX的）（集成數(shù)字開關(guān)） |
| 文件頁數(shù)： | 29/105頁 |
| 文件大?。?/td> | 334K |
| 代理商： | MT90812 |
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Advance Information
MT90812
25
Multiple IDX systems are supported by allowing the IDX to either drive or receive an 8.192 MHz clock. The
master IDX in the system may supply C8 while the slave IDX derive their timing from the master. In a multi-
chassis application a slave IDX may be required to generate its own C10. C8 is distributed between master and
slave IDX devices and the PLL is then used to phase lock C10, C4 and C2 to the C8 input.
The MT90812 Expansion Bus can be supported with either an 8.192 MHz or 16.384 MHz clock when operating
at 8.192 Mb/s. When the input clock source is selected as 16.384 MHz either HMVIP and non-HMVIP mode
may be used.
In a multiple IDX system the slave IDX devices are supplied C8 from a master IDX. A watchdog timer on the
IDX allows the slave IDX to monitor the C8 input. In the event of the loss of the C8 clock the slave IDX can be
switched to be master IDX and supply C8 to the system. This provides redundancy for the clock source
allowing IDX operation to remain independent of the other IDX devices if necessary.
Figure 16 - Clock Control Functional Diagram
*Non-mux mode addresses for TCR, OCCR, INTE and INTS are 382
, 383
, 384
and 385
, respectively.
**C8 and F8 are bi-directional pads. They are used as inputs in C8 timing mode, otherwise as output pads.
9.1
Input Timing Reference
The Input Timing Reference is selected setting CR1-0 and HMVIP bits in the Timing Control Register (TC)
described on page 55. One of five possible clock and frame pulse references, C4/F4, C8/F8, C8P, or C16/F8,
C16/HMVIP, can be selected, as listed in Table 9.
Table 9 - Clock Modes
The MT90812 requires at least an 8.192 MHz clock internally. When the C4 input clock is selected the 8.192
MHz clock is derived from the PLL. C4 is not a valid clock reference when the PLL is disabled.
CR1,0
HMVIP
Clock Reference
Frame Pulse Reference
00
x
C4
FPi(F4)
01
x
C8
F8i
10
x
C8P (default)
No Frame Pulse
11
0
C16 Non-HMVIP
FPi (F8)
11
1
C16 HMVIP
FPi(F4)
C8P_C16
PLL
C8 Internal CLK
ST_CLK
EST_CLK_IN
EST_CLK_OUT
WD
C8F
External
8.192 MHz
Crystal
C8**
F8**
C4o
WDE,FPO,CR1-0,HMVIP,PE,PMS,PCS
*02
H
Timing Control Register
PCOS,-,C10E,C8E,F8E,C4E,F4E,C2E
*03
H
Output Clock Control Register
C8
C8FE
*04
H
Interrupt Enable Register
C8F
*05
H
Interrupt Status Register
Timing
Interface
C10o
F4o
C2o
F8**
FPi
C8**
C4i
OSCo
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90812AL | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 192 X 192 16.384MBPS 5V 64MQFP - Trays 制造商:Zarlink Semiconductor Inc 功能描述:SWIT FABRIC 192 X 192 16.384MBPS 5V 64MQFP - Trays |
| MT90812AL1 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 192 X 192 16.384MBPS 5V 64MQFP - Trays 制造商:Microsemi Corporation 功能描述:PB FREE INTEGRATED DIGITAL SWITCH |
| MT90812AP | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Integrated Digital Switch (IDX) |
| MT90812AP1 | 制造商:Zarlink Semiconductor Inc 功能描述:SWIT FABRIC 192 X 192 16.384MBPS 5V 68PLCC /BAKE/DRYPACK - Rail/Tube 制造商:Zarlink Semiconductor Inc 功能描述:INTEGRATED DIGITAL SWCH |
| MT90812APR | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 192 X 192/64 X 64 1.048GBPS 5V 68PLCC - Tape and Reel |
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