參數(shù)資料
型號(hào)： MT90812
廠商： Mitel Networks Corporation
英文描述： Integrated Digital Switch (IDX)(集成數(shù)字開關(guān))
中文描述： 綜合數(shù)字交換機(jī)（IDX的）（集成數(shù)字開關(guān)）
文件頁數(shù)： 75/105頁
文件大?。?/td> 334K
代理商： MT90812
Advance Information
MT90812
71
22.28
HRA CTRL Register 2 (HC2)
The register is configured as follows:
Read/Write Address is: 51
H
Reset Value is: 00
H
Bit
Name
Description
7
SREOP
Software Controlled RX End Of Packet (SREOP).
The system can at any time inject a
receive end-of-packet by setting this bit. When RX circuitry uses this bit, SREOP will be
automatically cleared. SREOP has exactly the same effect and internal timing as REOP. On
reset, this bit is cleared.
6
RECTS
Re-initiate Clear To Send (RECTS)
. By setting this bit, the system can initiate another “go-
ahead” flag to the peripheral currently enabled for transmission to the system. This is used
when the CTS, which is automatically generated upon receive channel selection, is not
detected at the peripheral. RECTS is used with the same internal timing as the normal
source of CTS initiation. When RECTS has been used by the RX circuitry it is automatically
cleared. A RECTS request will be accepted only if the receiver is active; the request will be
ignored, and the RECTS bit cleared, if the receiver is inactive. On reset, this bit is cleared.
5
STEOP
Software Controlled TX End Of Packet (STEOP)
. The system can at any time inject a
transmit end-of-packet by setting this bit. When the TX circuitry uses this bit, STEOP will be
automatically cleared. STEOP has exactly the same effect and internal timing as TEOP. On
reset, this bit is cleared.
4
DDRX
Dedicated RX Control
. This bit when high enables dedicated reception from the channel
selected by the DRXi bits. At the same time, the generation of CTS is disabled, and flags
generated by the Auto-hunt circuitry are ignored. RXCHNL and RXACT are held high in
dedicated receive mode. If this bit is low, normal RX operation is enabled. On reset, this bit
is cleared.
3-0
DRX4-1
Dedicated RX Channel Number
. If the DDRX bit or the PRXSEL bit is high, then these bits
control the selection of the current receive channel, overriding the output of the Auto-hunt
circuitry. The RX Channel Number selects one of the first 16 timeslots of STi1, with HC1
register bit CD=0, or the last 16 timeslots with bit CD=1. DRX4 is the MSB and DRX1 is the
LSB. On reset, these bits are cleared.
7
6
5
4
3
2
1
0
RECTS
STEOP
DDRX
DRX4
DRX3
DRX2
DRX1
SREOP
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT90812AL 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 192 X 192 16.384MBPS 5V 64MQFP - Trays 制造商:Zarlink Semiconductor Inc 功能描述:SWIT FABRIC 192 X 192 16.384MBPS 5V 64MQFP - Trays
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MT90812AP 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Integrated Digital Switch (IDX)
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